| 2005 |
|---|
| 9 | | Marc Bautista-Palacios,
Luis Baldez,
Jordi Sempere-Agulló,
Atilà Herms-Berenguer,
Francisco Cardells-Tormo,
Pep-Lluis Molinet:
Configurable Hardware/Software Architecture for Data Acquisition: Implementation on FPGA.
FPL 2005: 241-246 |
| 8 | | Francisco Cardells-Tormo,
Pep-Lluis Molinet,
Jordi Sempere-Agulló,
Luis Baldez,
Marc Bautista-Palacios:
Area-Efficient 2-D Shift-Variant Convolvers for FPGA-based Digital Image Processing.
FPL 2005: 578-581 |
| 2004 |
|---|
| 7 | EE | Eduardo Picatoste-Olloqui,
Francisco Cardells-Tormo,
Jordi Sempere-Agulló,
Atilà Herms-Berenguer:
Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA.
FPL 2004: 279-288 |
| 2003 |
|---|
| 6 | EE | Francisco Cardells-Tormo,
Javier Valls-Coquillat,
Vicenc Almenar-Terre:
Symbol Timing Synchronization in FPGA-Based Software Radios: Application to DVB-S.
FPL 2003: 31-40 |
| 5 | EE | J. Marí-Roig,
V. Torres,
Ma José Canet,
A. Pérez,
T. Sansaloni,
Francisco Cardells-Tormo,
F. Angarita,
Felip Vicedo,
Vicenc Almenar-Terre,
Javier Valls-Coquillat:
DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems.
FPL 2003: 988-991 |
| 4 | EE | Francisco Cardells-Tormo,
Javier Valls-Coquillat:
Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs.
ISCAS (2) 2003: 260-263 |
| 2002 |
|---|
| 3 | EE | Francisco Cardells-Tormo,
Javier Valls-Coquillat,
Vicenc Almenar-Terre,
Vicente Torres-Carot:
Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard.
FPL 2002: 102-111 |
| 2 | EE | Francisco Cardells-Tormo,
Javier Valls-Coquillat:
High Performance Quadrature Digital Mixers for FPGAs.
FPL 2002: 905-914 |
| 1 | EE | Francisco Cardells-Tormo,
A. Valls-Coquillat:
Optimized FPGA-implementation of quadrature DDS.
ISCAS (5) 2002: 369-372 |
