Serge Weber

2008
25	EE	Slavisa Jovanovic, Camel Tanougast, Serge Weber: A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems. ARC 2008: 159-170
24	EE	Slavisa Jovanovic, Camel Tanougast, Serge Weber: A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems. ASAP 2008: 61-66
23	EE	Xun Zhang, Hassan Rabah, Serge Weber: Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC. DELTA 2008: 153-157
22	EE	Camel Tanougast, Serge Weber, Gilles Millerioux, Jamal Daafouz, Ahmed Bouridane: VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher. DELTA 2008: 386-389
21	EE	Xun Zhang, Hassan Rabah, Serge Weber: An Auto-adaptation Method for Dynamically Reconfigurable System-on-Chip. ISVLSI 2008: 499-502
20	EE	Ting Liu, Camel Tanougast, Serge Weber: A framework of architectural synthesis for dynamically reconfigurable FPGAs. SoCC 2008: 283-286
2007
19	EE	Camel Tanougast, Serge Weber, Gilles Millerioux, Ahmed Bouridane, Jamal Daafouz: An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance. AHS 2007: 110-118
18	EE	Xun Zhang, Hassan Rabah, Serge Weber: Auto-adaptive reconfigurable architecture for scalable multimedia applications. AHS 2007: 139-145
17	EE	Slavisa Jovanovic, Camel Tanougast, Serge Weber: A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems. AHS 2007: 358-364
16	EE	Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs. FPL 2007: 753-756
15		Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs. ReCoSoC 2007: 98-105
14	EE	Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber: The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. J. UCS 13(3): 349-362 (2007)
2005
13		Michael Janiaut, Camel Tanougast, Hassan Rabah, Yves Berviller, Christian Mannino, Serge Weber: Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis. FPL 2005: 386-390
2004
12		Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber: FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. ESA/VLSI 2004: 606-610
11	EE	Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber: FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T. FPL 2004: 1027-1031
10	EE	Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber: SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 157-163
2003
9	EE	Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber: Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. IPDPS 2003: 178
8	EE	Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber: Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. IWSOC 2003: 106-111
7	EE	Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber, Hassan Rabah: Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. Microprocessors and Microsystems 27(3): 115-130 (2003)
6	EE	Hassan Rabah, Hervé Mathias, Serge Weber, Eril Mozef, Camel Tanougast: Linear array processors with multiple access modes memory for real-time image processing. Real-Time Imaging 9(3): 205-213 (2003)
2002
5	EE	Hassan Rabah, Hervé Mathias, Eril Mozef, Domingo Torres, Serge Weber: Linear array processors with multiple access modes memory for real-time image processing. APCCAS (1) 2002: 203-206
4	EE	Sylvain Poussier, Hassan Rabah, Serge Weber: SOPC-based Embedded Smart Strain Gage Sensor. FPL 2002: 1131-1134
2000
3	EE	Camel Tanougast, Yves Berviller, Serge Weber: Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. IPDPS Workshops 2000: 959-965
1999
2		Domingo Torres, Hervé Mathias, Hassan Rabah, Serge Weber: SIMD/restricted MIMD parallel architecture for Image Processing Based on a New Design of a Multi-mode Access Memory. PDPTA 1999: 567-570
1996
1	EE	Eril Mozef, Serge Weber, Jamal Jaber, Claude Bataille: LAPCAM, Linear Array of Processors Using Content-Addressable Memories: A New Design of Machine Vision for Parallel Image Computations. MVA 1996: 166-169

Coauthor Index

1	Claude Bataille	[1]
2	Yves Berviller	[3] [7] [8] [9] [10] [11] [12] [13] [14]
3	Christophe Bobda	[15] [16]
4	Ahmed Bouridane	[19] [22]
5	Philippe Brunet	[7] [8] [9]
6	Jamal Daafouz	[19] [22]
7	Jamal Jaber	[1]
8	Michael Janiaut	[10] [11] [12] [13]
9	Slavisa Jovanovic	[15] [16] [17] [24] [25]
10	Ting Liu	[20]
11	Christian Mannino	[10] [11] [12] [13]
12	Hervé Mathias	[2] [5] [6]
13	Gilles Millerioux	[19] [22]
14	Eril Mozef	[1] [5] [6]
15	Oscar Pérez	[14]
16	Sylvain Poussier	[4]
17	Hassan Rabah	[2] [4] [5] [6] [7] [10] [11] [12] [13] [18] [21] [23]
18	Camel Tanougast	[3] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [22] [24] [25]
19	Domingo Torres	[2] [5]
20	Xun Zhang	[18] [21] [23]