Brad L. Hutchings

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35 Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn Bohner: Design Productivity for Configurable Computing. ERSA 2008: 57-66
34EEBrent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin: Design, Debug, Deploy: The Creation of Configurable Computing Applications. Signal Processing Systems 53(1-2): 187-196 (2008)
33EEAndré DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica: What is the right model for programming and using modern FPGAs? FPGA 2004: 119
32EEBrad L. Hutchings, Brent E. Nelson: GigaOp DSP on FPGA. VLSI Signal Processing 36(1): 41-55 (2004)
31EEPreston A. Jackson, Brad L. Hutchings, Justin L. Tripp: Simulation and Synthesis of CSP-based Interprocess Communication. FCCM 2003: 218-227
30EEK. Scott Hemmert, Justin L. Tripp, Brad L. Hutchings, Preston A. Jackson: Source Level Debugger for the Sea Cucumber Synthesizing Compiler. FCCM 2003: 228-
29EEAnthony L. Slade, Brent E. Nelson, Brad L. Hutchings: Reconfigurable Computing Application Frameworks. FCCM 2003: 251-
28EEBrad L. Hutchings, R. Franklin, D. Carver: Assisting Network Intrusion Detection with Reconfigurable Hardware. FCCM 2002: 111-120
27EEWesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings: Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. FPL 2002: 806-815
26EEJustin L. Tripp, Preston A. Jackson, Brad L. Hutchings: Sea Cucumber: A Synthesizing Compiler for FPGAs. FPL 2002: 875-885
25EEDavid Eppstein, Marshall W. Bern, Brad L. Hutchings: Algorithms for Coloring Quadtrees. Algorithmica 32(1): 87-94 (2002)
24EEMichael J. Wirthlin, Brad L. Hutchings, Carl Worth: Synthesizing RTL Hardware from Java Byte Codes. FPL 2001: 123-132
23EETimothy Wheeler, Paul Graham, Brent E. Nelson, Brad L. Hutchings: Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. FPL 2001: 483-492
22EEBrad L. Hutchings, Brent E. Nelson: Unifying simulation and execution in a design environment for FPGA systems. IEEE Trans. VLSI Syst. 9(1): 201-205 (2001)
21EEPeter Bellows, Brad L. Hutchings: Designing Run-Time Reconfigurable Systems with JHDL. VLSI Signal Processing 28(1-2): 29-45 (2001)
20EEBrad L. Hutchings, Brent E. Nelson: Using general-purpose programming languages for FPGA design. DAC 2000: 561-566
19EEPaul Graham, Brad L. Hutchings, Brent E. Nelson: Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. FCCM 2000: 305-306
18EEBrad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin: Designing and Debugging Custom Computing Applications. IEEE Design & Test of Computers 17(1): 20-28 (2000)
17EEBrad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting: A CAD Suite for High-Performance FPGA Design. FCCM 1999: 12-24
16EEAlan Marshall, Tony Stansfield, Igor Kostarnov, Jean Vuillemin, Brad L. Hutchings: A Reconfigurable Arithmetic Array for Multimedia Application. FPGA 1999: 135-143
15EEDavid Eppstein, Marshall W. Bern, Brad L. Hutchings: Algorithms for Coloring Quadtrees CoRR cs.CG/9907030: (1999)
14EEPeter Bellows, Brad L. Hutchings: JHDL - An HDL for Reconfigurable Systems. FCCM 1998: 175-
13EEMichael J. Wirthlin, Brad L. Hutchings: Improving functional density using run-time circuit reconfiguration [FPGAs]. IEEE Trans. VLSI Syst. 6(2): 247-256 (1998)
12EEMichael Rencher, Brad L. Hutchings: Automated target recognition on SPLASH 2. FCCM 1997: 192-200
11EEMichael J. Wirthlin, Brad L. Hutchings: Improving Functional Density Through Run-Time Constant Propagation. FPGA 1997: 86-92
10 Brad L. Hutchings: Exploiting reconfigurability through domain-specific systems. FPL 1997: 193-202
9EEBrad L. Hutchings: ASICs, Processors, and Configurable Computing. HICSS (1) 1997: 719-719
8EEMichael J. Wirthlin, Brad L. Hutchings: Sequencing Run-Time Reconfigured Hardware with Software. FPGA 1996: 122-128
7EEJames G. Eldredge, Brad L. Hutchings: Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. VLSI Signal Processing 12(1): 67-86 (1996)
6EEJames D. Hadley, Brad L. Hutchings: Design methodologies for partially reconfigured systems. FCCM 1995: 78-84
5EEMichael J. Wirthlin, Brad L. Hutchings: A dynamic instruction set computer. FCCM 1995: 99-109
4 Russell J. Petersen, Brad L. Hutchings: An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing. FPL 1995: 293-302
3 Brad L. Hutchings, Michael J. Wirthlin: Implementation Approaches for Reconfigurable Logic Applications. FPL 1995: 419-428
2 Brad L. Hutchings, Tony M. Carter: High-Speed Circuit Design: CAD Tools and Computational Challenges. HICSS (1) 1994: 26-35
1 Brad L. Hutchings, A. R. Grahn, Russell J. Petersen: Multiple-Layer Cross-Field Ultrasonic Tactile Sensor. ICRA 1994: 2522-2528

Coauthor Index

1Peter M. Athanas (Peter Athanas) [35]
2Peter Bellows [14] [17] [21]
3Marshall W. Bern [15] [25]
4Shawn Bohner [35]
5Tony M. Carter [2]
6D. Carver [28]
7André DeHon [33]
8James G. Eldredge [7]
9David Eppstein [15] [25]
10R. Franklin [28]
11Paul Graham [19] [23]
12A. R. Grahn [1]
13James D. Hadley [6]
14Joseph Hawkins [17]
15K. Scott Hemmert [17] [30]
16James Hwang [33]
17Preston A. Jackson [26] [30] [31]
18Igor Kostarnov [16]
19Wesley J. Landaker [27]
20Alan Marshall [16]
21Brent E. Nelson [17] [18] [19] [20] [22] [23] [29] [32] [34] [35]
22 Nikhil [33]
23Russell J. Petersen [1] [4]
24Salil Raje [33]
25Michael Rencher [12]
26Daryl Rudusky [33]
27Mike Rytting [17]
28Anthony L. Slade [29]
29Tony Stansfield [16]
30Adrian Stoica [33]
31Justin L. Tripp [26] [30] [31]
32Jean Vuillemin [16]
33Timothy Wheeler [23]
34Michael J. Wirthlin [3] [5] [8] [11] [13] [18] [24] [27] [34] [35]
35Carl Worth [24]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)