Brad L. Hutchings

2008
35		Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn Bohner: Design Productivity for Configurable Computing. ERSA 2008: 57-66
34	EE	Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin: Design, Debug, Deploy: The Creation of Configurable Computing Applications. Signal Processing Systems 53(1-2): 187-196 (2008)
2004
33	EE	André DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica: What is the right model for programming and using modern FPGAs? FPGA 2004: 119
32	EE	Brad L. Hutchings, Brent E. Nelson: GigaOp DSP on FPGA. VLSI Signal Processing 36(1): 41-55 (2004)
2003
31	EE	Preston A. Jackson, Brad L. Hutchings, Justin L. Tripp: Simulation and Synthesis of CSP-based Interprocess Communication. FCCM 2003: 218-227
30	EE	K. Scott Hemmert, Justin L. Tripp, Brad L. Hutchings, Preston A. Jackson: Source Level Debugger for the Sea Cucumber Synthesizing Compiler. FCCM 2003: 228-
29	EE	Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings: Reconfigurable Computing Application Frameworks. FCCM 2003: 251-
2002
28	EE	Brad L. Hutchings, R. Franklin, D. Carver: Assisting Network Intrusion Detection with Reconfigurable Hardware. FCCM 2002: 111-120
27	EE	Wesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings: Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. FPL 2002: 806-815
26	EE	Justin L. Tripp, Preston A. Jackson, Brad L. Hutchings: Sea Cucumber: A Synthesizing Compiler for FPGAs. FPL 2002: 875-885
25	EE	David Eppstein, Marshall W. Bern, Brad L. Hutchings: Algorithms for Coloring Quadtrees. Algorithmica 32(1): 87-94 (2002)
2001
24	EE	Michael J. Wirthlin, Brad L. Hutchings, Carl Worth: Synthesizing RTL Hardware from Java Byte Codes. FPL 2001: 123-132
23	EE	Timothy Wheeler, Paul Graham, Brent E. Nelson, Brad L. Hutchings: Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. FPL 2001: 483-492
22	EE	Brad L. Hutchings, Brent E. Nelson: Unifying simulation and execution in a design environment for FPGA systems. IEEE Trans. VLSI Syst. 9(1): 201-205 (2001)
21	EE	Peter Bellows, Brad L. Hutchings: Designing Run-Time Reconfigurable Systems with JHDL. VLSI Signal Processing 28(1-2): 29-45 (2001)
2000
20	EE	Brad L. Hutchings, Brent E. Nelson: Using general-purpose programming languages for FPGA design. DAC 2000: 561-566
19	EE	Paul Graham, Brad L. Hutchings, Brent E. Nelson: Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. FCCM 2000: 305-306
18	EE	Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin: Designing and Debugging Custom Computing Applications. IEEE Design & Test of Computers 17(1): 20-28 (2000)
1999
17	EE	Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting: A CAD Suite for High-Performance FPGA Design. FCCM 1999: 12-24
16	EE	Alan Marshall, Tony Stansfield, Igor Kostarnov, Jean Vuillemin, Brad L. Hutchings: A Reconfigurable Arithmetic Array for Multimedia Application. FPGA 1999: 135-143
15	EE	David Eppstein, Marshall W. Bern, Brad L. Hutchings: Algorithms for Coloring Quadtrees CoRR cs.CG/9907030: (1999)
1998
14	EE	Peter Bellows, Brad L. Hutchings: JHDL - An HDL for Reconfigurable Systems. FCCM 1998: 175-
13	EE	Michael J. Wirthlin, Brad L. Hutchings: Improving functional density using run-time circuit reconfiguration [FPGAs]. IEEE Trans. VLSI Syst. 6(2): 247-256 (1998)
1997
12	EE	Michael Rencher, Brad L. Hutchings: Automated target recognition on SPLASH 2. FCCM 1997: 192-200
11	EE	Michael J. Wirthlin, Brad L. Hutchings: Improving Functional Density Through Run-Time Constant Propagation. FPGA 1997: 86-92
10		Brad L. Hutchings: Exploiting reconfigurability through domain-specific systems. FPL 1997: 193-202
9	EE	Brad L. Hutchings: ASICs, Processors, and Configurable Computing. HICSS (1) 1997: 719-719
1996
8	EE	Michael J. Wirthlin, Brad L. Hutchings: Sequencing Run-Time Reconfigured Hardware with Software. FPGA 1996: 122-128
7	EE	James G. Eldredge, Brad L. Hutchings: Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. VLSI Signal Processing 12(1): 67-86 (1996)
1995
6	EE	James D. Hadley, Brad L. Hutchings: Design methodologies for partially reconfigured systems. FCCM 1995: 78-84
5	EE	Michael J. Wirthlin, Brad L. Hutchings: A dynamic instruction set computer. FCCM 1995: 99-109
4		Russell J. Petersen, Brad L. Hutchings: An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing. FPL 1995: 293-302
3		Brad L. Hutchings, Michael J. Wirthlin: Implementation Approaches for Reconfigurable Logic Applications. FPL 1995: 419-428
1994
2		Brad L. Hutchings, Tony M. Carter: High-Speed Circuit Design: CAD Tools and Computational Challenges. HICSS (1) 1994: 26-35
1		Brad L. Hutchings, A. R. Grahn, Russell J. Petersen: Multiple-Layer Cross-Field Ultrasonic Tactile Sensor. ICRA 1994: 2522-2528

Coauthor Index

1	Peter M. Athanas (Peter Athanas)	[35]
2	Peter Bellows	[14] [17] [21]
3	Marshall W. Bern	[15] [25]
4	Shawn Bohner	[35]
5	Tony M. Carter	[2]
6	D. Carver	[28]
7	André DeHon	[33]
8	James G. Eldredge	[7]
9	David Eppstein	[15] [25]
10	R. Franklin	[28]
11	Paul Graham	[19] [23]
12	A. R. Grahn	[1]
13	James D. Hadley	[6]
14	Joseph Hawkins	[17]
15	K. Scott Hemmert	[17] [30]
16	James Hwang	[33]
17	Preston A. Jackson	[26] [30] [31]
18	Igor Kostarnov	[16]
19	Wesley J. Landaker	[27]
20	Alan Marshall	[16]
21	Brent E. Nelson	[17] [18] [19] [20] [22] [23] [29] [32] [34] [35]
22	Nikhil	[33]
23	Russell J. Petersen	[1] [4]
24	Salil Raje	[33]
25	Michael Rencher	[12]
26	Daryl Rudusky	[33]
27	Mike Rytting	[17]
28	Anthony L. Slade	[29]
29	Tony Stansfield	[16]
30	Adrian Stoica	[33]
31	Justin L. Tripp	[26] [30] [31]
32	Jean Vuillemin	[16]
33	Timothy Wheeler	[23]
34	Michael J. Wirthlin	[3] [5] [8] [11] [13] [18] [24] [27] [34] [35]
35	Carl Worth	[24]

Colors in the list of coauthors