dblp.uni-trier.dewww.uni-trier.de

Chun Hok Ho

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo
Home Page

2008
11EEKa Fai Cedric Yiu, Chun Hok Ho, Nedelko Grbic, Yao Lu, Xiaoxiang Shi, Wayne Luk: Reconfigurable acceleration of microphone array algorithms for speech enhancement. ASAP 2008: 203-208
10EEChun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton: Rapid estimation of power consumption for hybrid FPGAs. FPL 2008: 227-232
9EESteven J. E. Wilton, Chun Hok Ho, Bradley R. Quinton, Philip Heng Wai Leong, Wayne Luk: A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications. TRETS 1(1): (2008)
2007
8EESteven J. E. Wilton, Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Bradley R. Quinton: A synthesizable datapath-oriented embedded FPGA fabric. FPGA 2007: 33-41
7EEChun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton: Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications. FPL 2007: 196-201
2006
6 Chun Hok Ho, Ka Fai Cedric Yiu, Jiaquan Huo, Sven Nordholm, Wayne Luk: Reconfigurable Acceleration of Robust Frequency-Domain Echo Cancellation. ERSA 2006: 184-190
5EEChun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton, Sergio López-Buedo: Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs. FCCM 2006: 35-44
2005
4 G. L. Zhang, Philip Heng Wai Leong, Chun Hok Ho, Kuen Hung Tsoi, Chris C. C. Cheung, Dong-U Lee, Ray C. C. Cheung, Wayne Luk: Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. FPT 2005: 215-222
2004
3EEKuen Hung Tsoi, Chun Hok Ho, H. C. Yeung, Philip Heng Wai Leong: An Arithmetic Library and Its Application to the N-body Problem. FCCM 2004: 68-78
2002
2EEChun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner: Fly - A Modifiable Hardware Compiler. FPL 2002: 381-390
1EEChun Hok Ho, M. P. Leong, Philip Heng Wai Leong, Jürgen Becker, Manfred Glesner: Rapid Prototyping of FPGA Based Floating Point DSP Systems. IEEE International Workshop on Rapid System Prototyping 2002: 19-24

Coauthor Index

1Jürgen Becker [1]
2Chris C. C. Cheung [4]
3Ray C. C. Cheung [4]
4Manfred Glesner [1] [2]
5Nedelko Grbic [11]
6Jiaquan Huo [6]
7Dong-U Lee [4]
8M. P. Leong [1]
9Philip Heng Wai Leong [1] [2] [3] [4] [5] [7] [8] [9] [10]
10Sergio López-Buedo [5]
11Yao Lu [11]
12Ralf Ludewig [2]
13Wayne Luk [4] [5] [6] [7] [8] [9] [10] [11]
14Sven Nordholm [6]
15Alberto García Ortiz [2]
16Bradley R. Quinton [8] [9]
17Xiaoxiang Shi [11]
18Kuen Hung Tsoi [2] [3] [4]
19Steven J. E. Wilton [5] [7] [8] [9] [10]
20H. C. Yeung [3]
21Ka Fai Cedric Yiu [6] [11]
22Chi Wai Yu [7]
23G. L. Zhang [4]
24Peter Zipf [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)