| 2008 |
|---|
| 10 | EE | Steffen Köhler,
Jan Schirok,
Jens Braunes,
Rainer G. Spallek:
Efficiency of Dynamic Reconfigurable Datapath Extensions -- A Case Study.
ARC 2008: 296-301 |
| 2006 |
|---|
| 9 | | Steffen Köhler,
Martin Zimmerling,
Martin Zabel,
Rainer G. Spallek:
Prototyping and Application Development Framework for Dynamically Reconfigurable DSP Architectures.
ARCS Workshops 2006: 142-151 |
| 2005 |
|---|
| 8 | | Jens Braunes,
Steffen Köhler,
Annett Königsmann,
Rainer G. Spallek:
Ein Zwischenformat-Profiler für das RECAST-Framework.
ARCS Workshops 2005: 33-38 |
| 2004 |
|---|
| 7 | EE | Jens Braunes,
Steffen Köhler,
Rainer G. Spallek:
RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures.
ARCS 2004: 156-166 |
| 6 | | Thomas Preußer,
Steffen Köhler,
Rainer G. Spallek:
RECAST - Design Space Exploration for Dynamic Reconfigurable Embedded Computing.
ESA/VLSI 2004: 130-135 |
| 5 | EE | Steffen Köhler,
Jens Braunes,
Thomas Preußer,
Martin Zabel,
Rainer G. Spallek:
Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration.
FPL 2004: 781-790 |
| 2002 |
|---|
| 4 | EE | Sebastian Friebe,
Steffen Köhler,
Rainer G. Spallek,
Henrik Juhr,
Klaus Künanz:
A Reconfigurable System-on-Chip-Based Fast EDM Process Monitor.
FPL 2002: 1164-1167 |
| 3 | EE | Steffen Köhler,
Jens Braunes,
Sergej Sawitzki,
Rainer G. Spallek:
Improving Code Efficiency for Reconfigurable VLIW Processors.
IPDPS 2002 |
| 2001 |
|---|
| 2 | EE | Sergej Sawitzki,
Steffen Köhler,
Rainer G. Spallek:
Prototyping Framework for Reconfigurable Processors.
FPL 2001: 6-16 |
| 1999 |
|---|
| 1 | | Steffen Köhler,
Sergej Sawitzki,
Achim Gratz,
Rainer G. Spallek:
Digital Signal Processing with General Purpose Microprocessors, DSP and Rcinfigurable Logic.
IPPS/SPDP Workshops 1999: 706-708 |
