2008 |
26 | EE | Thilo Pionteck,
Carsten Albrecht,
Roman Koch,
Torben Brix,
Erik Maehle:
Design and Simulation of Runtime Reconfigurable Systems.
DDECS 2008: 154-157 |
25 | EE | Thilo Pionteck,
Roman Koch,
Carsten Albrecht,
Erik Maehle,
Michael Meitinger,
Rainer Ohlendorf,
Thomas Wild,
Andreas Herkersdorf:
Network processors.
FPL 2008: 352 |
24 | EE | Thilo Pionteck,
Carsten Albrecht,
Roman Koch,
Erik Maehle:
On the design parameters of runtime reconfigurable systems.
FPL 2008: 683-686 |
23 | EE | Carsten Albrecht,
Philipp Roß,
Roman Koch,
Thilo Pionteck,
Erik Maehle:
Performance Analysis of Bus-Based Interconnects for a Run-Time Reconfigurable Co-Processor Platform.
PDP 2008: 200-205 |
22 | EE | Carsten Albrecht,
Roman Koch,
Thilo Pionteck,
Erik Maehle,
Michael Werner,
Rudolf Fuchsen:
WCET determination tool for embedded systems software.
SimuTools 2008: 48 |
21 | EE | Thilo Pionteck,
Carsten Albrecht,
Roman Koch,
Erik Maehle:
Adaptive Communication Architectures for Runtime Reconfigurable System-on-Chips.
Parallel Processing Letters 18(2): 275-289 (2008) |
2007 |
20 | EE | Roman Koch,
Thilo Pionteck,
Carsten Albrecht,
Erik Maehle:
A Lightweight Framework for Runtime Reconfigurable System Prototyping.
IEEE International Workshop on Rapid System Prototyping 2007: 61-64 |
19 | EE | Thilo Pionteck,
Carsten Albrecht,
Roman Koch,
Erik Maehle,
Michael Hübner,
Jürgen Becker:
Communication Architectures for Dynamically Reconfigurable FPGA Designs.
IPDPS 2007: 1-8 |
18 | EE | Heiko Hinkelmann,
Peter Zipf,
Manfred Glesner,
Thilo Pionteck:
Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme).
it - Information Technology 49(3): 174- (2007) |
2006 |
17 | EE | Thilo Pionteck,
Carsten Albrecht,
Roman Koch:
A dynamically reconfigurable packet-switched network-on-chip.
DATE 2006: 136-137 |
16 | EE | Thilo Pionteck,
Roman Koch,
Carsten Albrecht:
Applying Partial Reconfiguration to Networks-On-Chips.
FPL 2006: 1-6 |
15 | EE | Roman Koch,
Thilo Pionteck,
Carsten Albrecht,
Erik Maehle:
An adaptive system-on-chip for network applications.
IPDPS 2006 |
2005 |
14 | | Heiko Hinkelmann,
Thilo Pionteck,
Oliver Kleine,
Manfred Glesner:
Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten.
ARCS Workshops 2005: 45-51 |
13 | EE | Manfred Glesner,
Heiko Hinkelmann,
Thomas Hollstein,
Leandro Soares Indrusiak,
Tudor Murgan,
Abdulfattah Mohammad Obeid,
Mihail Petrov,
Thilo Pionteck,
Peter Zipf:
Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques.
SAMOS 2005: 12-21 |
12 | EE | Thilo Pionteck,
Thomas Stiefmeier,
Thorsten Staake,
Manfred Glesner:
On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction.
VLSI-SoC 2005: 283-297 |
2004 |
11 | | Thilo Pionteck,
Thomas Stiefmeier,
Thorsten Staake,
Lukusa D. Kabulepa,
Manfred Glesner:
Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren.
ARCS Workshops 2004: 155-164 |
10 | EE | Manfred Glesner,
Thomas Hollstein,
Leandro Soares Indrusiak,
Peter Zipf,
Thilo Pionteck,
Mihail Petrov,
Heiko Zimmer,
Tudor Murgan:
Reconfigurable platforms for ubiquitous computing.
Conf. Computing Frontiers 2004: 377-389 |
9 | EE | Thilo Pionteck,
Thorsten Staake,
Thomas Stiefmeier,
Lukusa D. Kabulepa,
Manfred Glesner:
On the design of a function-specific reconfigurable: hardware accelerator for the MAC-layer in WLANs.
FPGA 2004: 258 |
8 | EE | Thilo Pionteck,
Thomas Stiefmeier,
Thorsten Staake,
Manfred Glesner:
A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals.
FPL 2004: 1090-1092 |
7 | | Thilo Pionteck,
Thorsten Staake,
Thomas Stiefmeier,
Lukusa D. Kabulepa,
Manfred Glesner:
Design of a reconfigurable AES encryption/decryption engine for mobile terminals.
ISCAS (2) 2004: 545-548 |
2003 |
6 | EE | Thilo Pionteck,
A. Garcya,
Lukusa D. Kabulepa,
Manfred Glesner:
The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures.
IEEE International Workshop on Rapid System Prototyping 2003: 141-147 |
5 | | Thilo Pionteck,
Lukusa D. Kabulepa,
Manfred Glesner:
Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs.
VLSI-SOC 2003: 161-166 |
2002 |
4 | EE | Thilo Pionteck,
Peter Zipf,
Lukusa D. Kabulepa,
Manfred Glesner:
A Framework for Teaching (Re)Configurable Architectures in Student Projects.
FPL 2002: 444-451 |
3 | EE | Thilo Pionteck,
N. Toender,
Lukusa D. Kabulepa,
Manfred Glesner,
T. Kella:
On the Rapid Prototyping of Equalizers for OFDM Systems.
IEEE International Workshop on Rapid System Prototyping 2002: 48-52 |
2001 |
2 | EE | Jürgen Becker,
Nicolas Liebau,
Thilo Pionteck,
Manfred Glesner:
Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures.
FPL 2001: 584-589 |
2000 |
1 | EE | Jürgen Becker,
Thilo Pionteck,
Manfred Glesner:
DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications.
FPL 2000: 312-321 |