Hans-Jörg Pfleiderer

2008
26	EE	Stefan Lachowicz, Hans-Jörg Pfleiderer: Fast Evaluation of the Square Root and Other Nonlinear Functions in FPGA. DELTA 2008: 474-477
25	EE	Oliver A. Pfänder, Reinhard Nopper, Hans-Jörg Pfleiderer, Shun Zhou, Amine Bermak: Configurable Blocks for Multi-precision Multiplication. DELTA 2008: 478-481
24	EE	Christiane Beuschel, Hans-Jörg Pfleiderer: FPGA implementation of a flexible decoder for long LDPC codes. FPL 2008: 185-190
23	EE	Oliver A. Pfänder, Hans-Jörg Pfleiderer: EMMA - A suggestion for an embedded multi-precision multiplier array for FPGAs. FPL 2008: 435-438
2007
22		Ricardo Augusto da Luz Reis, Adam Osseiran, Hans-Jörg Pfleiderer: VLSI-SoC: From Systems To Silicon, Proceedings of IFIP TC 10, WG 10.5, Thirteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2005), October 17-19, 2005, Perth, Australia Springer 2007
21	EE	Christophe Layer, Daniel Schaupp, Hans-Jörg Pfleiderer: Area and Throughput Aware Comparator Networks Optimization for Parallel Data Processing on FPGA. ISCAS 2007: 405-408
2006
20	EE	Francisco-Javier Veredas, Michael Scheppler, Hans-Jörg Pfleiderer: Automated conversion from a LUT-based FPGA to a LUT-based MPGA with fast turnaround time. DATE Designers' Forum 2006: 36-41
19	EE	Francisco-Javier Veredas, Hans-Jörg Pfleiderer: Automated Conversion From Lut-Based FPGAs to LUT-Based MPGAs. FPL 2006: 1-2
18	EE	Francisco-Javier Veredas, Michael Scheppler, Bumei Zhai, Hans-Jörg Pfleiderer: LUT-based MPGAs for fast turnaround time conversion flow. ISCAS 2006
17	EE	Francisco-Javier Veredas, Michael Scheppler, Bumei Zhai, Hans-Jörg Pfleiderer: Regular Routing Architecture for a LUT-based MPGA. ISVLSI 2006: 257-262
16	EE	Jürgen Rauscher, Hans-Jörg Pfleiderer: Sensitivity of a Power Supply Damping Method to Resistance and Current Waveform Variations. PATMOS 2006: 496-503
15	EE	Markus Buck, Tim Haulick, Hans-Jörg Pfleiderer: Self-calibrating microphone arrays for speech signal acquisition: A systematic approach. Signal Processing 86(6): 1230-1238 (2006)
2005
14	EE	Christophe Layer, Hans-Jörg Pfleiderer: Efficient Hardware Search Engine for Associative Content Retrieval of Long Queries in Huge Multimedia Databases. ICME 2005: 1034-1037
13		Christophe Layer, Hans-Jörg Pfleiderer: Vertical Sorting Techniques Accelerating Associative Accesses based Information Retrieval Systems. Parallel and Distributed Computing and Networks 2005: 411-416
12	EE	Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher: 3D Chip Stack Technology Using Through-Chip Interconnects. IEEE Design & Test of Computers 22(6): 512-518 (2005)
2004
11		Christophe Layer, Hans-Jörg Pfleiderer: High Performance Associative Coprocessor Architecture for Advanced Database Searching. Databases and Applications 2004: 87-92
10	EE	Christophe Layer, Hans-Jörg Pfleiderer: A Reconfigurable Recurrent Bitonic Sorting Network for Concurrently Accessible Data. FPL 2004: 648-657
9	EE	Oliver A. Pfänder, Roland Hacker, Hans-Jörg Pfleiderer: A Multiplexer-Based Concept for Reconfigurable Multiplier Arrays. FPL 2004: 938-942
8		Christophe Layer, Hans-Jörg Pfleiderer, Christoph Heer: A scalable compact architecture for the computation of integer binary logarithms through linear approximation. ISCAS (2) 2004: 421-424
7	EE	Markus Tahedl, Hans-Jörg Pfleiderer: Dynamic Wire Delay and Slew Metrics for Integrated Bus Structures. PATMOS 2004: 69-78
2002
6	EE	Wolfgang Schlecker, Achim Engelhart, Werner G. Teich, Hans-Jörg Pfleiderer: Hardware Implementation of a Multiuser Detection Scheme Based on Recurrent Neural Networks. FPL 2002: 1097-1100
5	EE	Slavek Bulach, Anton Brauchle, Hans-Jörg Pfleiderer, Zdenek Kucerovsky: Design and Implementation of Discrete Event Control Systems: A Petri Net Based Hardware Approach. Discrete Event Dynamic Systems 12(3): 287-309 (2002)
2001
4	EE	Slavek Bulach, Anton Brauchle, Hans-Jörg Pfleiderer, Zdenek Kucerovsky: Petri Net Based Design and Implementation Methodology for Discrete Event Control Systems. ICATPN 2001: 81-100
1999
3		Stefan Lachowicz, Kamran Eshraghian, Hans-Jörg Pfleiderer: Self-Timed Techniques for Low-Power Digital Arithmetic in GaAs VLSI. VLSI 1999: 245-256
1994
2		G. Nebel, U. Kleine, Hans-Jörg Pfleiderer: Large Bandwidth BiCMOS Operational Amplifiers for SC-Video-Applications. ISCAS 1994: 85-88
1985
1		Egon Hörbst, H. Oechslein, Hans-Jörg Pfleiderer: VLSI - Auswirkungen auf konventionelle Rechnerstrukturen. Informatik Spektrum 8(1): 7-19 (1985)

Coauthor Index

1	Peter Benkart	[12]
2	Amine Bermak	[25]
3	Christiane Beuschel	[24]
4	Anton Brauchle	[4] [5]
5	Markus Bschorr	[12]
6	Markus Buck	[15]
7	Slavek Bulach	[4] [5]
8	Achim Engelhart	[6]
9	Kamran Eshraghian	[3]
10	Roland Hacker	[9]
11	Tim Haulick	[15]
12	Christoph Heer	[8]
13	Arne Heittmann	[12]
14	Egon Hörbst	[1]
15	Holger Huebner	[12]
16	Alexander Kaiser	[12]
17	U. Kleine	[2]
18	Erhard Kohn	[12]
19	Zdenek Kucerovsky	[4] [5]
20	Stefan Lachowicz	[3] [26]
21	Christophe Layer	[8] [10] [11] [13] [14] [21]
22	Andreas Munding	[12]
23	G. Nebel	[2]
24	Reinhard Nopper	[25]
25	H. Oechslein	[1]
26	Adam Osseiran	[22]
27	Oliver A. Pfänder	[9] [23] [25]
28	Ulrich Ramacher	[12]
29	Jürgen Rauscher	[16]
30	Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis)	[22]
31	Daniel Schaupp	[21]
32	Michael Scheppler	[17] [18] [20]
33	Wolfgang Schlecker	[6]
34	Markus Tahedl	[7]
35	Werner G. Teich	[6]
36	Francisco-Javier Veredas	[17] [18] [19] [20]
37	Bumei Zhai	[17] [18]
38	Shun Zhou	[25]

Colors in the list of coauthors