2008 |
23 | EE | Hillary Tarus,
John Bush,
James Irvine,
John Dunlop:
Exploiting Redundancies to Improve Performance of LT Decoding.
CNSR 2008: 198-202 |
22 | EE | Hisham Dahshan,
James Irvine:
Analysis of Key Distribution in Mobile Ad Hoc Networks Based on Message Relaying.
WiMob 2008: 538-542 |
2007 |
21 | EE | Hillary Tarus,
John Bush,
James Irvine,
John Dunlop:
Ubiquitous Entity Interactions and Dispatcher Architecture.
VTC Fall 2007: 106-110 |
20 | EE | Tracy McKay,
James Irvine:
Authentication and Authorisation for a Personal Distributed Environment.
VTC Spring 2007: 174-178 |
2006 |
19 | EE | Oliver Sims,
James Irvine:
A real-time implementation of Richardson-Lucy deconvolution.
FPGA 2006: 232 |
18 | EE | Michael Gilroy,
James Irvine,
William Berrie:
FPGA based RAID 6 hardware accelerator.
FPGA 2006: 232 |
17 | EE | Oliver Sims,
James Irvine:
An FPGA Implementation of Pattern-Selective Pyramidal Image Fusion.
FPL 2006: 1-4 |
16 | EE | Michael Gilroy,
James Irvine:
RAID 6 Hardware Acceleration.
FPL 2006: 1-6 |
15 | EE | Alisdair McDiarmid,
James Irvine:
Anonymous Network Access Using the Digital Marketplace.
VTC Fall 2006: 1-5 |
14 | EE | Alisdair McDiarmid,
James Irvine:
Commitment-Aware Reputation System for the Digital Marketplace.
VTC Spring 2006: 86-90 |
2005 |
13 | EE | Chong Shen,
Dirk Pesch,
James Irvine:
A Framework for Self-Management of Hybrid Wireless Networks Using Autonomic Computing Principles.
CNSR 2005: 261-266 |
12 | EE | Edward Brown,
James Irvine,
Bill Wilkie:
Rapid prototyping of a test harness for forward error correcting codes (abstract only).
FPGA 2005: 276 |
2004 |
11 | EE | Daniel Denning,
Malachy Devlin,
James Irvine:
Hardware co-simulation in system generator of the AES-128 encryption algorithm.
FPGA 2004: 247 |
10 | EE | Daniel Denning,
James Irvine,
Malachy Devlin:
A Key Agile 17.4 Gbit/sec Camellia Implementation.
FPL 2004: 546-554 |
9 | EE | Daniel Denning,
James Irvine,
Derek Stark,
Malachy Devlin:
Multi-User FPGA Co-Simulation over TCP/IP.
IEEE International Workshop on Rapid System Prototyping 2004: 151-156 |
8 | EE | Ian Robertson,
James Irvine:
A design flow for partially reconfigurable hardware.
ACM Trans. Embedded Comput. Syst. 3(2): 257-283 (2004) |
7 | EE | Irene C. Y. Ma,
James Irvine:
Characteristics of WAP Traffic.
Wireless Networks 10(1): 71-81 (2004) |
2003 |
6 | EE | Daniel Denning,
Neil Harold,
Malachy Devlin,
James Irvine:
Using System Generator to Design a Reconfigurable Video Encryption System.
FPL 2003: 980-983 |
2002 |
5 | EE | Ian Robertson,
James Irvine,
Patrick Lysaght,
David Robinson:
Timing verification of dynamically reconfigurable logic for the xilinx virtex FPGA series.
FPGA 2002: 127-135 |
4 | EE | Ian Robertson,
James Irvine,
Patrick Lysaght,
David Robinson:
Improved Functional Simulation of Dynamically Reconfigurable Logic.
FPL 2002: 152-161 |
3 | EE | R. Mathur,
James Irvine,
John Dunlop,
Yeonwoo Lee,
Steve McLaughlin:
Cost/commitment tradeoffs in UMTS networks using the digital marketplace.
MWCN 2002: 251-255 |
2001 |
2 | EE | John Dunlop,
Gwenaël Le Bodic,
James Irvine,
Demessie Girma:
QoS management with dynamic bearer selection schemes.
Computer Networks 37(1): 45-53 (2001) |
1999 |
1 | | Patrick Lysaght,
James Irvine,
Reiner W. Hartenstein:
Field-Programmable Logic and Applications, 9th International Workshop, FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings
Springer 1999 |