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José M. M. Ferreira

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2002
5EEManuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. M. Ferreira: On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs. FPL 2002: 302-311
1999
4EEGustavo R. Alves, Tito G. B. Amaral, José M. M. Ferreira: Board-level prototype validation: a built-in controller and extended BST architecture. ISCAS (1) 1999: 169-172
3EEGustavo R. Alves, José M. M. Ferreira: A system verification strategy based on the BST infrastructure. ISCAS (1) 1999: 35-38
1993
2 José M. M. Ferreira, Manuel G. Gericota, José L. Ramalho, Gustavo R. Alves: BIST for 1149.1-Compatible Boards: A Low-Cost and Maximum-Flexibility Solution. ITC 1993: 536-543
1992
1 José M. M. Ferreira, Filipe S. Pinto, José Silva Matos: A Boundary Scan Test Controller for Hierarchical BIST. ITC 1992: 217-223

Coauthor Index

1Gustavo R. Alves [2] [3] [4] [5]
2Tito G. B. Amaral [4]
3Manuel G. Gericota [2] [5]
4José Silva Matos [1]
5Filipe S. Pinto [1]
6José L. Ramalho [2]
7Miguel L. Silva [5]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)