| 2008 |
|---|
| 92 | EE | Ryan W. Robucci,
Jordan D. Gray,
David Abramson,
Paul E. Hasler:
A 256×256 separable transform CMOS imager.
ISCAS 2008: 1420-1423 |
| 91 | EE | Arindam Basu,
Csaba Petre,
Paul E. Hasler:
Bifurcations in a silicon neuron.
ISCAS 2008: 428-431 |
| 90 | EE | Stephen Brink,
Scott Koziol,
Shubha Ramakrishnan,
Paul E. Hasler:
A biophysically based dendrite model using programmable floating-gate devices.
ISCAS 2008: 432-435 |
| 89 | EE | Csaba Petre,
Craig Schlottmann,
Paul E. Hasler:
Automated conversion of Simulink designs to analog hardware on an FPAA.
ISCAS 2008: 500-503 |
| 88 | EE | Sheng-Yu Peng,
Bradley A. Minch,
Paul E. Hasler:
Analog VLSI implementation of support vector machine learning and classification.
ISCAS 2008: 860-863 |
| 87 | EE | Jordan D. Gray,
Venkatesh Srinivasan,
Ryan W. Robucci,
Paul E. Hasler:
A floating-gate transistor based continuous-time analog adaptive filter.
ISCAS 2008: 908-911 |
| 2007 |
|---|
| 86 | EE | I. Faik Baskaya,
Brian Gestner,
Christopher M. Twigg,
Sung Kyu Lim,
David V. Anderson,
Paul E. Hasler:
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array.
FCCM 2007: 319-320 |
| 85 | EE | Christopher M. Twigg,
Paul E. Hasler,
I. Faik Baskaya:
A Self-Contained Large-Scale FPAA Development Platform.
ISCAS 2007: 1187-1191 |
| 84 | EE | Paul E. Hasler,
Arindam Basu,
Sctt Kozil:
Above Threshold pFET InjectionModeling intended for ProgrammingFloating-Gate Systems.
ISCAS 2007: 1557-1560 |
| 83 | EE | Arindam Basu,
Kofi M. Odame,
Paul E. Hasler:
Dynamics of a Logarithmic Transimpedance Amplifier.
ISCAS 2007: 1673-1676 |
| 82 | EE | Christopher M. Twigg,
Jordan D. Gray,
Paul E. Hasler:
Programmable Floating Gate FPAA Switches Are Not Dead Weight.
ISCAS 2007: 169-172 |
| 81 | EE | Christopher M. Twigg,
Paul E. Hasler:
Programmable Conductance Switches for FPAAs.
ISCAS 2007: 173-176 |
| 80 | EE | Paul E. Hasler,
Christopher M. Twigg:
An OTA-based Large-Scale Field Programmable Analog Array (FPAA) for faster On-Chip Communication and Computation.
ISCAS 2007: 177-180 |
| 79 | EE | Erhan Ozalevli,
Walter Huang,
Paul E. Hasler,
David V. Anderson:
VLSI Implementation of a Reconfigurable Mixed-Signal Finite Impulse Response Filter.
ISCAS 2007: 2168-2171 |
| 78 | EE | Shyam Subramanian,
David V. Anderson,
Paul E. Hasler,
Bradley A. Minch:
Optimal Synthesis of MITE Translinear Loops.
ISCAS 2007: 2822-2825 |
| 77 | EE | Arindam Basu,
Ryan W. Robucci,
Paul E. Hasler:
A Low-Power, Compact, Adaptive Logarithmic Transimpedance Amplifier Operating over Seven Decades of Current.
ISCAS 2007: 3055-3058 |
| 76 | EE | Kofi M. Odame,
Paul E. Hasler:
An Adaptive Quality-Factor Bandpass Filter.
ISCAS 2007: 3295-3298 |
| 75 | EE | Paul E. Hasler,
Scott Kozoil,
Ethan Farquhar,
Arindam Basu:
Transistor Channel Dendrites implementing HMM classifiers.
ISCAS 2007: 3359-3362 |
| 74 | EE | Richard B. Wunderlich,
Brian P. Degnan,
Paul E. Hasler:
Capacitively-Biased Floating-Gate CMOS: a New Logic Family.
ISCAS 2007: 3728-3731 |
| 73 | EE | David W. Graham,
Paul E. Hasler:
Run-Time Programming of Analog Circuits Using Floating-Gate Transistors.
ISCAS 2007: 3816-3819 |
| 72 | EE | Kofi M. Odame,
Christopher M. Twigg,
Arindam Basu,
Paul E. Hasler:
Studying Nonlinear Dynamical Systems on a Reconfigurable Analog Platform.
ISCAS 2007: 445-448 |
| 71 | EE | Kofi M. Odame,
Paul E. Hasler:
An Efficient Oscillator Design Based on OTA Nonlinearity.
ISCAS 2007: 921-924 |
| 70 | EE | Arindam Basu,
Paul E. Hasler:
A Fully Integrated Architecture for Fast Programming of Floating Gates.
ISCAS 2007: 957-960 |
| 69 | EE | Sheng-Yu Peng,
Paul E. Hasler,
David V. Anderson:
An analog programmable multi-dimensional radial basis function based classifier.
VLSI-SoC 2007: 13-18 |
| 2006 |
|---|
| 68 | EE | Ethan Farquhar,
Christal Gordon,
Paul E. Hasler:
A field programmable neural array.
ISCAS 2006 |
| 67 | EE | H. Dine,
S. Chuang,
Phillip E. Allen,
Paul E. Hasler:
A rail to rail, slew-boosted pre-charge buffer.
ISCAS 2006 |
| 66 | EE | Erhan Ozalevli,
Paul E. Hasler:
A tunable floating gate CMOS resistor for low-power and low-voltage applications.
ISCAS 2006 |
| 65 | EE | Christal Gordon,
Amanda Preyer,
Karolyn Babalola,
Robert J. Butera,
Paul E. Hasler:
An artificial synapse for interfacing to biological neurons.
ISCAS 2006 |
| 64 | EE | Sheng-Yu Peng,
Muhammad S. Qureshi,
Paul E. Hasler,
N. A. Hall,
F. L. Degertekin:
High SNR capacitive sensing transducer.
ISCAS 2006 |
| 63 | EE | Erhan Ozalevli,
Muhammad S. Qureshi,
Paul E. Hasler:
Low-voltage floating-gate CMOS buffer.
ISCAS 2006 |
| 2005 |
|---|
| 62 | EE | Mark Hooper,
Matt Kucic,
Paul E. Hasler:
Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits.
ISCAS (1) 2005: 125-128 |
| 61 | EE | David N. Abramson,
Jordan D. Gray,
Christopher M. Twigg,
Paul E. Hasler:
Characteristics and programming of floating-gate pFET switches in an FPAA crossbar network.
ISCAS (1) 2005: 468-471 |
| 60 | EE | Shyam Subramanian,
David V. Anderson,
Paul E. Hasler,
Bradley A. Minch:
Synthesis of MITE log-domain filters with unique operating points.
ISCAS (2) 2005: 996-999 |
| 59 | EE | David W. Graham,
Paul D. Smith,
Richard Ellis,
Ravi Chawla,
Paul E. Hasler:
A low-power, programmable bandpass filter section for higher-order filter-bank applications.
ISCAS (3) 2005: 1980-1983 |
| 58 | EE | Abhishek Bandyopadhyay,
Guillermo J. Serrano,
Paul E. Hasler:
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method.
ISCAS (3) 2005: 2148-2151 |
| 57 | EE | Erhan Ozalevli,
Paul E. Hasler:
Programmable floating-gate CMOS resistors.
ISCAS (3) 2005: 2168-2171 |
| 56 | EE | David W. Graham,
Ethan Farquhar,
Brian P. Degnan,
Christal Gordon,
Paul E. Hasler:
Indirect programming of floating-gate transistors.
ISCAS (3) 2005: 2172-2175 |
| 55 | EE | Brian P. Degnan,
Richard B. Wunderlich,
Paul E. Hasler:
Programmable floating-gate techniques for CMOS inverters.
ISCAS (3) 2005: 2441-2444 |
| 54 | EE | Sheng-Yu Peng,
Bradley A. Minch,
Paul E. Hasler:
A programmable floating-gate bump circuit with variable width.
ISCAS (5) 2005: 4341-4344 |
| 53 | EE | Venkatesh Srinivasan,
Jeff Dugger,
Paul E. Hasler:
An adaptive analog synapse circuit that implements the least-mean-square learning rule.
ISCAS (5) 2005: 4441-4444 |
| 52 | EE | Abhishek Bandyopadhyay,
Jungwon Lee,
Ryan W. Robucci,
Paul E. Hasler:
A 80µW/frame 104×128 CMOS imager front end for JPEG compression.
ISCAS (5) 2005: 5318-5321 |
| 51 | EE | Erhan Ozalevli,
Christopher M. Twigg,
Paul E. Hasler:
10-bit programmable voltage-output digital-analog converter.
ISCAS (6) 2005: 5553-5556 |
| 50 | EE | Ravi Chawla,
Christopher M. Twigg,
Paul E. Hasler:
An analog modulator/demodulator using a programmable arbitrary waveform generator.
ISCAS (6) 2005: 6106-6109 |
| 49 | EE | Philomena C. Brady,
Paul E. Hasler:
Offset compensation in flash ADCs using floating-gate circuits.
ISCAS (6) 2005: 6154-6157 |
| 48 | EE | Paul E. Hasler:
Low-Power Programmable Signal Processing, invited.
IWSOC 2005: 413-418 |
| 47 | EE | David N. Abramson,
Jordan D. Gray,
Shyam Subramanian,
Paul E. Hasler:
A Field-Programmable Analog Array Using Translinear Elements.
IWSOC 2005: 425-428 |
| 46 | EE | Paul E. Hasler,
AiChen Low:
Programmable Low Dropout Voltage Regulator.
IWSOC 2005: 459-462 |
| 45 | EE | Paul E. Hasler:
Floating-Gate Devices, Circuits, and Systems, invited.
IWSOC 2005: 482-487 |
| 44 | EE | Tyson S. Hall,
Christopher M. Twigg,
Paul E. Hasler,
David V. Anderson:
Developing large-scale field-programmable analog arrays for rapid prototyping.
IJES 1(3/4): 179-192 (2005) |
| 2004 |
|---|
| 43 | EE | Tyson S. Hall,
Christopher M. Twigg,
Paul E. Hasler,
David V. Anderson:
Developing Large-Scale Field-Programmable Analog Arrays.
IPDPS 2004 |
| 42 | | Erhan Ozalevli,
Paul E. Hasler,
Farhan Adil:
Programmable voltage-output, floating-gate digital-analog converter.
ISCAS (1) 2004: 1064-1067 |
| 41 | EE | Daniel J. Allen,
Angelo W. Pereira,
Paul E. Hasler:
A programmable coefficient continuous-time A/D Delta-Sigma modulator.
ISCAS (1) 2004: 1148-1151 |
| 40 | | Shyam Subramanian,
David V. Anderson,
Paul E. Hasler:
Synthesis of static multiple input multiple output MITE networks.
ISCAS (1) 2004: 189-192 |
| 39 | | Angelo W. Pereira,
Daniel J. Allen,
Paul E. Hasler:
A 0.5µm CMOS programmable discrete-time Delta-Sigma modulator with floating gate elements.
ISCAS (1) 2004: 213-216 |
| 38 | | Ethan Farquhar,
Paul E. Hasler:
A bio-physically inspired silicon neuron.
ISCAS (1) 2004: 309-312 |
| 37 | | Ethan Farquhar,
David N. Abramson,
Paul E. Hasler:
A reconfigurable bidirectional active 2 dimensional dendrite model.
ISCAS (1) 2004: 313-316 |
| 36 | EE | Christal Gordon,
Ethan Farquhar,
Paul E. Hasler:
A family of floating-gate adapting synapses based upon transistor channel models.
ISCAS (1) 2004: 317-20 |
| 35 | EE | Ravi Chawla,
Haw-Jing Lo,
Arindam Basu,
Paul E. Hasler,
Bradley A. Minch:
A fully programmable log-domain bandpass filter using multiple-input translinear elements.
ISCAS (1) 2004: 33-36 |
| 34 | | Guillermo J. Serrano,
Paul E. Hasler:
A floating-gate DAC array.
ISCAS (1) 2004: 357-360 |
| 33 | | Guillermo J. Serrano,
Paul D. Smith,
Haw-Jing Lo,
Ravi Chawla,
Tyson S. Hall,
Christopher M. Twigg,
Paul E. Hasler:
Automatic rapid programming of large arrays of floating-gate elements.
ISCAS (1) 2004: 373-376 |
| 32 | EE | Haw-Jing Lo,
Guillermo J. Serrano,
Paul E. Hasler,
David V. Anderson,
Bradley A. Minch:
Programmable multiple input translinear elements.
ISCAS (1) 2004: 757-760 |
| 31 | EE | Ravi Chawla,
Guillermo J. Serrano,
Daniel J. Allen,
Angelo W. Pereira,
Paul E. Hasler:
Fully differential floating-gate programmable OTAs with novel common-mode feedback.
ISCAS (1) 2004: 817-820 |
| 30 | EE | Paul D. Smith,
David W. Graham,
Ravi Chawla,
Paul E. Hasler:
A five-transistor bandpass filter element.
ISCAS (1) 2004: 861-864 |
| 29 | | David W. Graham,
Paul D. Smith,
Richard Ellis,
Ravi Chawla,
Paul E. Hasler:
A programmable bandpass array using floating-gate elements.
ISCAS (1) 2004: 97-100 |
| 28 | | Tyson S. Hall,
Christopher M. Twigg,
Paul E. Hasler,
David V. Anderson:
Application performance of elements in a floating-gate FPAA.
ISCAS (2) 2004: 589-592 |
| 27 | | Jeff Dugger,
Paul E. Hasler:
Supervised learning in a two-input analog floating-gate node.
ISCAS (5) 2004: 756-759 |
| 26 | | Heejong Yoo,
David W. Graham,
David V. Anderson,
Paul E. Hasler:
C4 band-pass delay filter for continuous-time subband adaptive tapped-delay filter.
ISCAS (5) 2004: 792-795 |
| 25 | | Mark Hooper,
Matt Kucic,
Paul E. Hasler:
5V-only, standard 0.5/spl mu/m CMOS programmable and adaptive floating-gate circuits and arrays using CMOS charge pumps.
ISCAS (5) 2004: 832-835 |
| 24 | | Mark Hooper,
Matt Kucic,
Paul E. Hasler:
Characterization of charge-pump rectifiers for standard submicron CMOS processes.
ISCAS (5) 2004: 964-967 |
| 2002 |
|---|
| 23 | EE | Tyson S. Hall,
Paul E. Hasler,
David V. Anderson:
Field-Programmable Analog Arrays: A Floating-Gate Approach.
FPL 2002: 424-433 |
| 22 | EE | Richard A. Blum,
Charles S. Wilson,
Paul E. Hasler,
Stephen P. DeWeerth:
A CMOS imager with real-time frame differencing and centroid computation.
ISCAS (3) 2002: 329-332 |
| 21 | EE | Paul E. Hasler,
Abhishek Bandyopadhyay,
Paul D. Smith:
A matrix transform imager allowing high-fill factor.
ISCAS (3) 2002: 337-340 |
| 20 | EE | J. A. Bragg,
Edgar A. Brown,
Paul E. Hasler,
Stephen P. DeWeerth:
A silicon model of an adapting motoneuron.
ISCAS (4) 2002: 261-264 |
| 19 | EE | Joseph D. Neff,
Brian K. Meadows,
Edgar A. Brown,
Stephen P. DeWeerth,
Paul E. Hasler:
A CMOS coupled nonlinear oscillator array.
ISCAS (4) 2002: 301-304 |
| 18 | EE | Paul D. Smith,
Matt Kucic,
Richard Ellis,
Paul E. Hasler,
David V. Anderson:
Mel-frequency cepstrum encoding in analog floating-gate circuitry.
ISCAS (4) 2002: 671-674 |
| 17 | EE | Paul D. Smith,
Matt Kucic,
Paul E. Hasler:
Accurate programming of analog floating-gate arrays.
ISCAS (5) 2002: 489-492 |
| 16 | EE | C. Duffy,
Ethan Farquhar,
Paul E. Hasler:
Practical issues using e-pot circuits.
ISCAS (5) 2002: 493-496 |
| 15 | EE | Christal Gordon,
Paul E. Hasler:
Biological learning modeled in an adaptive floating-gate system.
ISCAS (5) 2002: 609-612 |
| 14 | EE | T. M. Massengill,
D. M. Wilson,
Paul E. Hasler,
David W. Graham:
Empirical comparison of analog and digital auditory preprocessing for automatic speech recognition.
ISCAS (5) 2002: 77-80 |
| 2001 |
|---|
| 13 | EE | Matt Kucic,
Paul E. Hasler,
Jeff Dugger,
David V. Anderson:
Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits.
ARVLSI 2001: 148-162 |
| 1999 |
|---|
| 12 | EE | Paul E. Hasler,
Bradley A. Minch,
Chris Diorio:
Adaptive Circuits Using pFET Floating-Gate Devices.
ARVLSI 1999: 215-231 |
| 11 | EE | Bradley A. Minch,
Paul E. Hasler,
Chris Diorio:
Synthesis of multiple-input translinear element networks.
ISCAS (2) 1999: 236-239 |
| 10 | EE | Paul E. Hasler,
Bradley A. Minch,
Chris Diorio:
Floating-gate devices: they are not just for digital memories any more.
ISCAS (2) 1999: 388-391 |
| 9 | EE | Bradley A. Minch,
Paul E. Hasler:
A floating-gate technology for digital CMOS processes.
ISCAS (2) 1999: 400-403 |
| 8 | EE | Paul E. Hasler,
Paul D. Smith:
An autozeroing floating-gate amplifier with gain adaptation.
ISCAS (2) 1999: 412-415 |
| 7 | EE | Paul E. Hasler,
Jeff Dugger:
Correlation learning rule in floating-gate pFET synapses.
ISCAS (5) 1999: 387-390 |
| 1996 |
|---|
| 6 | EE | W. Fritz Kruger,
Paul E. Hasler,
Bradley A. Minch,
Christof Koch:
An Adaptive WTA using Floating Gate Technology.
NIPS 1996: 720-726 |
| 1995 |
|---|
| 5 | | Paul E. Hasler,
Chris Diorio,
Bradley A. Minch,
Carver Mead:
Single Transistor Learning Synapse with Long Term Storage.
ISCAS 1995: 1660-1663 |
| 4 | | Chris Diorio,
Sunit Mahajan,
Paul E. Hasler,
Bradley A. Minch,
Carver Mead:
A High-Resolution Non-Volatile Analog Memory Cell.
ISCAS 1995: 2233-2236 |
| 3 | | Bradley A. Minch,
Chris Diorio,
Paul E. Hasler,
Carver Mead:
A vMOS Soft-Maximum Current Mirror.
ISCAS 1995: 2249-2252 |
| 1994 |
|---|
| 2 | EE | Bradley A. Minch,
Paul E. Hasler,
Chris Diorio,
Carver Mead:
A Silicon Axon.
NIPS 1994: 739-746 |
| 1 | EE | Paul E. Hasler,
Chris Diorio,
Bradley A. Minch,
Carver Mead:
Single Transistor Learning Synapses.
NIPS 1994: 817-824 |
