dblp.uni-trier.dewww.uni-trier.de

Richard H. Turner

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2003
7EERichard H. Turner, Roger Woods: Design Flow for Efficient FPGA Reconfiguration. FPL 2003: 972-975
2002
6EETim Courtney, Richard H. Turner, Roger Woods: Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes. FCCM 2002: 318-
5EERichard H. Turner, Roger Woods, Tim Courtney: Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs. FPL 2002: 192-201
2001
4EEJean-Paul Heron, Roger Woods, Sakir Sezer, Richard H. Turner: Development of a Run-Time Reconfiguration System with Low Reconfiguration Overhead. VLSI Signal Processing 28(1-2): 97-113 (2001)
2000
3EETim Courtney, Richard H. Turner, Roger Woods: An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing. FCCM 2000: 341-343
2EETim Courtney, Richard H. Turner, Roger Woods: Multiplexer Based Reconfiguration for Virtex Multipliers. FPL 2000: 749-758
1999
1EERichard H. Turner, Roger Woods, Sakir Sezer, Jean-Paul Heron: A Virtual Hardware Handler for RTR Systems. FCCM 1999: 262-263

Coauthor Index

1Tim Courtney [2] [3] [5] [6]
2Jean-Paul Heron [1] [4]
3Sakir Sezer [1] [4]
4Roger Woods (Roger F. Woods) [1] [2] [3] [4] [5] [6] [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)