Giacinto Paolo Saggese

2005
13	EE	Giacinto Paolo Saggese, Anoop Vetteth, Zbigniew Kalbarczyk, Ravishankar K. Iyer: Microprocessor Sensitivity to Failures: Control vs Execution and Combinational vs Sequential Logic. DSN 2005: 760-769
12	EE	Nithin Nakka, Giacinto Paolo Saggese, Zbigniew Kalbarczyk, Ravishankar K. Iyer: An Architectural Framework for Detecting Process Hangs/Crashes. EDCC 2005: 103-121
11	EE	Giacinto Paolo Saggese, Nicholas J. Wang, Zbigniew Kalbarczyk, Sanjay J. Patel, Ravishankar K. Iyer: An Experimental Study of Soft Errors in Microprocessors. IEEE Micro 25(6): 30-39 (2005)
2004
10	EE	Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese: Carry-Save Montgomery Modular Exponentiation on Reconfigurable Hardware. DATE 2004: 206-211
9	EE	Giacinto Paolo Saggese, Claudio Basile, Luigi Romano, Zbigniew Kalbarczyk, Ravishankar K. Iyer: Hardware Support for High Performance, Intrusion- and Fault-Tolerant Systems. SRDS 2004: 195-204
8		Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese, Giuseppe Cattaneo: A Web Services Based Architecture for Digital Time Stamping. J. Web Eng. 2(3): 148-175 (2004)
7	EE	Giacinto Paolo Saggese, Luigi Romano, Nicola Mazzocca, Antonino Mazzeo: A tamper resistant hardware accelerator for RSA cryptographic applications. Journal of Systems Architecture 50(12): 711-727 (2004)
6	EE	Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese: Exploring the design-space for FPGA-based implementation of RSA. Microprocessors and Microsystems 28(4): 183-191 (2004)
2003
5	EE	Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese, Nicola Mazzocca: FPGA-Based Implementation of a Serial RSA Processor. DATE 2003: 10582-10589
4	EE	Giacinto Paolo Saggese, Antonino Mazzeo, Nicola Mazzocca, Antonio G. M. Strollo: An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm. FPL 2003: 292-302
3	EE	Alessandro Cilardo, Antonino Mazzeo, Luigi Romano, Giacinto Paolo Saggese, Giuseppe Cattaneo: Using Web Services Technology for Inter-enterprise Integration of Digital Time Stamping. OTM Workshops 2003: 960-974
2	EE	Domenico Cotroneo, Cristiano di Flora, Antonino Mazzeo, Luigi Romano, Stefano Russo, Giacinto Paolo Saggese: Providing Digital Time Stamping Services to Mobile Devices. WORDS Fall 2003: 94-100
2002
1	EE	Beniamino Di Martino, Nicola Mazzocca, Giacinto Paolo Saggese, Antonio G. M. Strollo: A Technique for FPGA Synthesis Driven by Automatic Source Code Analysis and Transformations. FPL 2002: 47-58

Coauthor Index

1	Claudio Basile	[9]
2	Giuseppe Cattaneo	[3] [8]
3	Alessandro Cilardo	[3] [6] [8] [10]
4	Domenico Cotroneo	[2]
5	Cristiano di Flora	[2]
6	Ravishankar K. Iyer (Ravi K. Iyer)	[9] [11] [12] [13]
7	Zbigniew Kalbarczyk	[9] [11] [12] [13]
8	Beniamino Di Martino	[1]
9	Antonino Mazzeo	[2] [3] [4] [5] [6] [7] [8] [10]
10	Nicola Mazzocca	[1] [4] [5] [7]
11	Nithin Nakka	[12]
12	Sanjay J. Patel	[11]
13	Luigi Romano	[2] [3] [5] [6] [7] [8] [9] [10]
14	Stefano Russo	[2]
15	Antonio G. M. Strollo	[1] [4]
16	Anoop Vetteth	[13]
17	Nicholas J. Wang	[11]