| 2008 |
|---|
| 8 | EE | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
A high performance floating-point special function unit using constrained piecewise quadratic approximation.
ISCAS 2008: 472-475 |
| 2007 |
|---|
| 7 | EE | Nicola Petra,
Davide De Caro,
Antonio G. M. Strollo:
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme.
IEEE Trans. Computers 56(11): 1470-1483 (2007) |
| 2005 |
|---|
| 6 | EE | Antonio G. M. Strollo,
Davide De Caro,
E. Napoli,
Nicola Petra:
A novel high-speed sense-amplifier-based flip-flop.
IEEE Trans. VLSI Syst. 13(11): 1266-1274 (2005) |
| 2003 |
|---|
| 5 | EE | Giacinto Paolo Saggese,
Antonino Mazzeo,
Nicola Mazzocca,
Antonio G. M. Strollo:
An FPGA-Based Performance Analysis of the Unrolling, Tiling, and Pipelining of the AES Algorithm.
FPL 2003: 292-302 |
| 4 | EE | Antonio G. M. Strollo,
Davide De Caro:
Direct digital frequency synthesizers exploiting piecewise linear Chebyshev approximation.
Microelectronics Journal 34(11): 1099-1106 (2003) |
| 2002 |
|---|
| 3 | EE | Beniamino Di Martino,
Nicola Mazzocca,
Giacinto Paolo Saggese,
Antonio G. M. Strollo:
A Technique for FPGA Synthesis Driven by Automatic Source Code Analysis and Transformations.
FPL 2002: 47-58 |
| 2000 |
|---|
| 2 | EE | Antonio G. M. Strollo,
E. Napoli,
Davide De Caro:
New clock-gating techniques for low-power flip-flops.
ISLPED 2000: 114-119 |
| 1 | EE | Antonio G. M. Strollo,
E. Napoli,
C. Cimino:
Analysis of power dissipation in double edge-triggered flip-flops.
IEEE Trans. VLSI Syst. 8(5): 624-629 (2000) |
