| 2008 |
| 18 | EE | Kimmo U. Järvinen,
Jorma Skyttä:
On Parallelization of High-Speed Processors for Elliptic Curve Cryptography.
IEEE Trans. VLSI Syst. 16(9): 1162-1175 (2008) |
| 2007 |
| 17 | EE | Kimmo U. Järvinen,
Juha Forsten,
Jorma Skyttä:
FPGA Design of Self-certified Signature Verification on Koblitz Curves.
CHES 2007: 256-271 |
| 2005 |
| 16 | | Kimmo U. Järvinen,
Matti Tommiska,
Jorma Skyttä:
A Compact MD5 and SHA-1 Co-Implementation Utilizing Algorithm Similarities.
ERSA 2005: 48-54 |
| 15 | EE | Kimmo U. Järvinen,
Matti Tommiska,
Jorma Skyttä:
Hardware Implementation Analysis of the MD5 Hash Algorithm.
HICSS 2005 |
| 2004 |
| 14 | EE | Kimmo U. Järvinen,
Matti Tommiska,
Jorma Skyttä:
A VHDL Generator for Elliptic Curve Cryptography.
FPL 2004: 1098-1100 |
| 13 | | Antti Hämäläinen,
Matti Tommiska,
Jorma Skyttä:
FPGA-Based Implementation of a 59-Neuron Feedforward Neural Network with a 17.1 Gbps Interlayer Throughput.
IC-AI 2004: 181-187 |
| 2003 |
| 12 | EE | Kimmo U. Järvinen,
Matti Tommiska,
Jorma Skyttä:
A fully pipelined memoryless 17.8 Gbps AES-128 encryptor.
FPGA 2003: 207-215 |
| 2002 |
| 11 | EE | Antti Hämäläinen,
Matti Tommiska,
Jorma Skyttä:
8 Gigabits per Second Implementation of the IDEA Cryptographic Algorithm.
FPL 2002: 760-769 |
| 2001 |
| 10 | EE | Matti Tommiska,
Jorma Skyttä:
Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware.
FPL 2001: 653-657 |
| 9 | | Mika Loukola,
Jorma Skyttä:
Enhanced Augmented IP Routing Protocol (EAIRP) in IPv6 Environment.
Electronic Commerce Research 1(4): 359-370 (2001) |
| 1999 |
| 8 | | Juha Forsten,
Mika Loukola,
Jorma Skyttä:
Hardware Acceleration inside a Differentiated Services Access Node.
IDMS 1999: 3-16 |
| 1998 |
| 7 | | Mika Loukola,
Jorma Skyttä:
New Possibilities Offered by IPv6.
ICCCN 1998: 548-552 |
| 6 | | Mika Loukola,
Jorma Skyttä:
Hop-by-hop option based flow-handling compared to other IP over ATM protocols.
PICS 1998: 83-94 |
| 5 | EE | Mika Loukola,
Jorma Skyttä:
IPv6 over ATM flow-handling.
Computer Communications 21(13): 1124-1130 (1998) |
| 1988 |
| 4 | | Jorma Skyttä,
Tapio Takala:
A Distributed Data Model for Raytracing.
Advances in Computer Graphics Hardware 1988: 19-26 |
| 1987 |
| 3 | | Jorma Skyttä,
Tapio Takala:
Partially Ordered Search Indices in the Organization of a Fixed Hierarchy.
Advances in Computer Graphics Hardware 1987: 39-46 |
| 1986 |
| 2 | | Jorma Skyttä,
Tapio Takala:
Utilization of VLSI for Creating an Active Data Base of 3-D Geometric Models.
Advances in Computer Graphics Hardware 1986: 83-93 |
| 1 | | Iiro Hartimo,
Klaus Kronlöf,
Olli Simula,
Jorma Skyttä:
DFSP: A Data Flow Signal Processor.
IEEE Trans. Computers 35(1): 23-33 (1986) |