| 2002 |
|---|
| 5 | EE | Spyros Blionas,
Kostas Masselos,
Chrissavgi Dre,
Christos Drosos,
F. Z. Ieromnimon,
T. Pagonis,
A. Pneymatikakis,
Anna Tatsaki,
T. Trimis,
A. Vontzalidis,
Dimitris Metafas:
A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.
FPL 2002: 1080-1083 |
| 1996 |
|---|
| 4 | | F. Z. Ieromnimon,
T. J. Reynolds,
M. E. Waite:
The Design and Simulation of the PACE Prototype Architecture.
MASCOTS 1996: 157-161 |
| 3 | EE | M. E. Waite,
T. J. Reynolds,
F. Z. Ieromnimon:
Parallel Graph Reduction with the PACE Architecture.
PDP 1996: 448-454 |
| 1995 |
|---|
| 2 | | T. J. Reynolds,
M. E. Waite,
F. Z. Ieromnimon:
PACE: Fine-Grained Parallel Graph Reducion.
ICPP (1) 1995: 15-18 |
| 1 | | M. E. Waite,
T. J. Reynolds,
F. Z. Ieromnimon:
A New Approach to the Design of a Highly-Parallel Computer.
Parallel and Distributed Computing and Systems 1995: 451-454 |
