Nabeel Shirazi

2003
17	EE	Vinay Singh, Ann Root, E. Hemphill, Nabeel Shirazi, James Hwang: Accelerating Bit Error Rate Testing Using a System Level Design Tool. FCCM 2003: 62-68
16	EE	Jonathan Ballagh, James Hwang, H. Ma, Brent Milne, Nabeel Shirazi, Vinay Singh, Jeffrey D. Stroomer: Specifying Control Logic for DSP Applications in FPGA. FPL 2003: 1099-1102
2002
15	EE	Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi: Customising Floating-Point Designs. FCCM 2002: 315-317
14	EE	Altaf Abdul Gaffar, Wayne Luk, Peter Y. K. Cheung, Nabeel Shirazi, James Hwang: Automating Customisation of Floating-Point Designs. FPL 2002: 523-533
2001
13	EE	James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey D. Stroomer: System Level Tools for DSP in FPGAs. FPL 2001: 534-543
12	EE	Nabeel Shirazi, Dan Benyamin, Wayne Luk, Peter Y. K. Cheung, Shaori Guo: Quantitative Analysis of FPGA-based Database Searching. VLSI Signal Processing 28(1-2): 85-96 (2001)
1999
11	EE	Wayne Luk, T. K. Lee, J. Rice, Nabeel Shirazi, Peter Y. K. Cheung: Reconfigurable Computing for Augmented Reality. FCCM 1999: 136-145
10		Nabeel Shirazi, Wayne Luk, Dan Benyamin, Peter Y. K. Cheung: Quantitative Analysis of Run-Time Reconfigurable Database Search. FPL 1999: 253-263
1998
9	EE	Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung: Automating Production of Run-Time Reconfigurable Designs. FCCM 1998: 147-
8	EE	Wayne Luk, P. Andreou, Arran Derbyshire, F. Dupont-De-Dinechin, J. Rice, Nabeel Shirazi, D. Siganos: A Reconfigurable Engine for Real-Time Video Processing. FPL 1998: 169-178
7	EE	Nabeel Shirazi, Wayne Luk, Peter Y. K. Cheung: Run-Time Management of Dynamically Recongigurable Designs. FPL 1998: 59-68
1997
6	EE	Wayne Luk, Nabeel Shirazi, Peter Y. K. Cheung: Compilation tools for run-time reconfigurable designs. FCCM 1997: 56-65
5		Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung: Pipeline morphing and virtual pipelines. FPL 1997: 111-120
1996
4		Wayne Luk, Shaori Guo, Nabeel Shirazi, N. Zhuang: A Framework for Developing Parameterised FPGA Libraries. FPL 1996: 24-33
1995
3	EE	Nabeel Shirazi, Al Walters, Peter M. Athanas: Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. FCCM 1995: 155-163
2		Nabeel Shirazi, Peter M. Athanas, A. Lynn Abbott: Implementation of a 2-D Fast Fourier Transform on an FPGA-Based Custom Computing Machine. FPL 1995: 282-292
1993
1		Jeffrey M. Arnold, Duncan A. Buell, Dzung T. Hoang, Daniel V. Pryor, Nabeel Shirazi, Mark R. Thistle: The Splash 2 Processor and Applications. ICCD 1993: 482-485

Coauthor Index

1	A. Lynn Abbott	[2]
2	P. Andreou	[8]
3	Jeffrey M. Arnold	[1]
4	Peter M. Athanas (Peter Athanas)	[2] [3]
5	Jonathan Ballagh	[16]
6	Dan Benyamin	[10] [12]
7	Duncan A. Buell	[1]
8	Peter Y. K. Cheung	[5] [6] [7] [9] [10] [11] [12] [14] [15]
9	Arran Derbyshire	[8]
10	F. Dupont-De-Dinechin	[8]
11	Altaf Abdul Gaffar	[14] [15]
12	Shaori Guo	[4] [5] [12]
13	E. Hemphill	[17]
14	Dzung T. Hoang	[1]
15	James Hwang	[13] [14] [16] [17]
16	T. K. Lee	[11]
17	Wayne Luk	[4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15]
18	H. Ma	[16]
19	Brent Milne	[13] [16]
20	Daniel V. Pryor	[1]
21	J. Rice	[8] [11]
22	Ann Root	[17]
23	D. Siganos	[8]
24	Vinay Singh	[16] [17]
25	Jeffrey D. Stroomer	[13] [16]
26	Mark R. Thistle	[1]
27	Al Walters	[3]
28	N. Zhuang	[4]