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Sorin Cotofana

Sorin Dan Cotofana

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2008
58EEAnca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana: Compositional, dynamic cache management for embedded chip multiprocessors. DATE 2008: 991-996
57EERadu Stefan, Sorin Dan Cotofana: Bitstream compression techniques for Virtex 4 FPGAs. FPL 2008: 323-328
2007
56EEAnca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Multimedia Communicating Tasks CoRR abs/0710.4658: (2007)
55EEAnca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors. T. HiPEAC 1: 279-297 (2007)
2006
54EEAnca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Static cache partitioning robustness analysis for embedded on-chip multi-processors. Conf. Computing Frontiers 2006: 353-360
53EEAnca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional, efficient caches for a chip multi-processor. DATE 2006: 345-350
52 Tudor Niculiu, Cristian Lupu, Sorin Cotofana: Consciousness for modeling intelligence - simulating the evolution by closure to the inverse. ICINCO-ICSO 2006: 187-190
51EEAnca Mariana Molnos, Sorin Dan Cotofana, Marc J. M. Heijligers, Jos T. J. van Eijndhoven: Throughput optimization via cache partitioning for embedded multiprocessors. ICSAMOS 2006: 185-192
50EECor Meenderinck, Sorin Cotofana: Electron counting based high-radix multiplication in single electron tunneling technology. ISCAS 2006
49EECor Meenderinck, Sorin Cotofana: High-Radix Addition and Multiplication in the Electron Counting Paradigm Using Single Electron Tunneling Technology. SAMOS 2006: 447-456
2005
48EESorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267
47EECor Meenderinck, Sorin Cotofana, Casper Lageweg: High Radix Addition Via Conditional Charge Transport in Single Electron Tunneling Technology. ASAP 2005: 294-302
46EEAnca Mariana Molnos, Marc J. M. Heijligers, Sorin Dan Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Multimedia Communicating Tasks. DATE 2005: 932-937
45EESorin Dan Cotofana, Casper Lageweg, Stamatis Vassiliadis: Addition Related Arithmetic Operations via Controlled Transport of Charge. IEEE Trans. Computers 54(3): 243-256 (2005)
44EEMihai Sima, Sorin Cotofana, Jos T. J. van Eijndhoven, Stamatis Vassiliadis, Kees A. Vissers: IEEE-Compliant IDCT on FPGA-Augmented TriMedia. VLSI Signal Processing 39(3): 195-212 (2005)
2004
43EECasper Lageweg, Sorin Cotofana, Stamatis Vassiliadis: Binary Multiplication based on Single Electron Tunneling. ASAP 2004: 152-166
42EEDan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha: Efficient Hardware for Antialiasing Coverage Mask Generation. Computer Graphics International 2004: 257-264
41EEDan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha: GRAAL - A Development Framework for Embedded Graphics Accelerators. DATE 2004: 1366-1367
40EEAnca Mariana Molnos, Marc J. M. Heijligers, Sorin Cotofana, Jos T. J. van Eijndhoven: Compositional Memory Systems for Data Intensive Applications. DATE 2004: 728-729
39 Dan Crisu, Stamatis Vassiliadis, Sorin Cotofana, Petri Liuha: Low cost and latency embedded 3D graphics reciprocation. ISCAS (2) 2004: 905-908
38 Chaohong Hu, Sorin Dan Cotofana, Jiang Jianfei: Analysis of analog to digital converter based on single-electron tunnelling transistors. ISCAS (3) 2004: 693-696
37EEPeter Celinski, Said F. Al-Sarawi, Derek Abbott, Sorin Cotofana, Stamatis Vassiliadis: Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach. ISVLSI 2004: 127-134
36EEPeter Celinski, Derek Abbott, Sorin Cotofana: Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic. PATMOS 2004: 899-906
35EEDan Crisu, Sorin Cotofana, Stamatis Vassiliadis, Petri Liuha: High-Level Energy Estimation for ARM-Based SOCs. SAMOS 2004: 168-177
34EEChaohong Hu, Sorin Dan Cotofana, Jianfei Jiang, Qiyu Cai: Analog-to-digital converter based on single-electron tunneling transistors. IEEE Trans. VLSI Syst. 12(11): 1209-1213 (2004)
33EEMihai Sima, Sorin Dan Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: Pel reconstruction on FPGA-augmented TriMedia. IEEE Trans. VLSI Syst. 12(6): 622-635 (2004)
2003
32EEMihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven: Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor. ASAP 2003: 250-259
31EESorin Cotofana, Casper Lageweg, Stamatis Vassiliadis: On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge. IEEE Symposium on Computer Arithmetic 2003: 245-252
30EEPyrrhos Stathis, Stamatis Vassiliadis, Sorin Cotofana: A Hierarchical Sparse Matrix Storage Format for Vector Processors. IPDPS 2003: 61
29EEPeter Celinski, Derek Abbott, Sorin Dan Cotofana: Area efficient, high speed parallel counter circuits using charge recycling threshold logic. ISCAS (5) 2003: 233-236
28EEMarius Padure, Sorin Cotofana, Stamatis Vassiliadis: Design and experimental results of a CMOS flip-flop featuring embedded threshold logic. ISCAS (5) 2003: 253-256
27EEMarius Padure, Sorin Cotofana, Stamatis Vassiliadis: CMOS Implementation of Generalized Threshold Functions. IWANN (2) 2003: 65-72
26EEPeter Celinski, Sorin Cotofana, Derek Abbott: A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder. IWANN (2) 2003: 73-80
25EEPyrrhos Stathis, Stamatis Vassiliadis, Sorin Cotofana: D-SAB: A Sparse Matrix Benchmark Suite. PaCT 2003: 549-554
24 Casper Lageweg, Sorin Cotofana, Stamatis Vassiliadis: Evaluation Methodology for Single Electron Encoded Threshold Logic Gates. VLSI-SOC 2003: 258-262
23EEStamatis Vassiliadis, Stephan Wong, Sorin Cotofana: Microcode Processing: Positioning and Directions. IEEE Micro 23(4): 21-31 (2003)
2002
22 Tudor Niculiu, Sorin Cotofana: Hierarchical Intellignet Mixed Simulation. ESM 2002: 159-162
21EEStephan Wong, Stamatis Vassiliadis, Sorin Cotofana: A Sum of Absolute Differences Implementation in FPGA Hardware. EUROMICRO 2002: 183-188
20EEStephan Wong, Stamatis Vassiliadis, Sorin Cotofana: Microcoded Reconfigurable Embedded Processors: Current Developments. Embedded Processor Design Challenges 2002: 207-223
19EEMihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. Embedded Processor Design Challenges 2002: 224-241
18EEMihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. FCCM 2002: 261-
17EEMihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers: Field-Programmable Custom Computing Machines - A Taxonomy -. FPL 2002: 79-88
2001
16EEStamatis Vassiliadis, Francky Catthoor, Mateo Valero, Sorin Cotofana: Topic 15+20: Multimedia and Embedded Systems. Euro-Par 2001: 651-652
15EEStamatis Vassiliadis, Stephan Wong, Sorin Cotofana: The MOLEN rho-mu-Coded Processor. FPL 2001: 275-285
14 Mihai Sima, Sorin Cotofana, Stamatis Vassiliadis, Jos T. J. van Eijndhoven, Kees A. Vissers: MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. ICCD 2001: 425-430
2000
13 Tudor Niculiu, Chouki Aktouf, Sorin Cotofana: Hierarchical interfaces for hardware software systems. ESM 2000: 647-654
12EESorin Cotofana, Ben H. H. Juurlink, Stamatis Vassiliadis: Counter Based Superscalar Instruction Issuing. EUROMICRO 2000: 1307-1315
11EEMarian Stanca, Stamatis Vassiliadis, Sorin Cotofana, Henk Corporaal: Hashed Addressed Caches for Embedded Pointer Based Codes (Research Note). Euro-Par 2000: 965-968
10 Stephan Wong, Sorin Cotofana, Stamatis Vassiliadis: Multimedia Enhanced General-Purpose Processors. IEEE International Conference on Multimedia and Expo (III) 2000: 1493-1496
9EEStephan Wong, Sorin Cotofana, Stamatis Vassiliadis: General-Purpose Processor Huffman Encoding Extension. ITCC 2000: 158-163
8EESorin Cotofana, Stamatis Vassiliadis: Signed Digit Addition and Related Operations with Threshold Logic. IEEE Trans. Computers 49(3): 193-207 (2000)
1999
7EEStamatis Vassiliadis, Sorin Cotofana, Pyrrhos Stathis: Vector ISA Extension for Sparse Matrix-Vector Multiplication. Euro-Par 1999: 708-715
6EESorin Cotofana, Stamatis Vassiliadis: Serial binary multiplication with feed-forward neural networks. Neurocomputing 28(1-3): 1-19 (1999)
1998
5EESorin Cotofana, Stamatis Vassiliadis: On the Design Complexity of the Issue Logic of Superscalar Machines. EUROMICRO 1998: 10277-10284
4EESorin Cotofana, Stamatis Vassiliadis: Periodic symmetric functions, serial addition, and multiplication with neural networks. IEEE Transactions on Neural Networks 9(6): 1118-1128 (1998)
1996
3 Sorin Cotofana, Stamatis Vassiliadis: Serial Binary Addition with Polynominally Bounded Weights. ICANN 1996: 741-746
2 Stamatis Vassiliadis, Sorin Cotofana, Koen Bertels: 2-1 Additions and Related Arithmetic Operations with Threshold Logic. IEEE Trans. Computers 45(9): 1062-1067 (1996)
1EESorin Cotofana, Stamatis Vassiliadis: delta-Bit serial binary addition with linear threshold networks. VLSI Signal Processing 14(3): 249-264 (1996)

Coauthor Index

1Derek Abbott [26] [29] [36] [37]
2Chouki Aktouf [13]
3Said F. Al-Sarawi [37]
4Koen Bertels [2]
5Qiyu Cai [34]
6Francky Catthoor [16]
7Peter Celinski [26] [29] [36] [37]
8Henk Corporaal [11]
9Dan Crisu [35] [39] [41] [42]
10Jos T. J. van Eijndhoven [14] [17] [18] [19] [32] [33] [40] [44] [46] [51] [53] [54] [55] [56]
11Manfred Glesner [48]
12Marc J. M. Heijligers [40] [46] [51] [53] [54] [55] [56] [58]
13Chaohong Hu [34] [38]
14Adrian M. Ionescu [48]
15Jiang Jianfei [38]
16Jianfei Jiang [34]
17Ben H. H. Juurlink [12]
18Casper Lageweg [24] [31] [43] [45] [47]
19Yusuf Leblebici [48]
20Petri Liuha [35] [39] [41] [42]
21Cristian Lupu [52]
22Cor Meenderinck [47] [49] [50]
23Anca Mariana Molnos [40] [46] [51] [53] [54] [55] [56] [58]
24Tudor Niculiu [13] [22] [52]
25Marius Padure [27] [28]
26A. Rubio [48]
27Alexandre Schmid [48]
28Mihai Sima [14] [17] [18] [19] [32] [33] [44]
29Oliver Soffke [48]
30Marian Stanca [11]
31Pyrrhos Stathis [7] [25] [30]
32Radu Stefan [57]
33Mateo Valero [16]
34Stamatis Vassiliadis [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15] [16] [17] [18] [19] [20] [21] [23] [24] [25] [27] [28] [30] [31] [32] [33] [35] [37] [39] [41] [42] [43] [44] [45]
35Kees A. Vissers [14] [17] [18] [19] [33] [44]
36Stephan Wong [9] [10] [15] [20] [21] [23]
37Peter Zipf [48]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)