| 2008 |
|---|
| 8 | EE | John N. Coleman,
Christopher I. Softley,
Jiri Kadlec,
Rudolf Matousek,
Milan Tichý,
Zdenek Pohl,
Antonin Hermanek,
Nico F. Benschop:
The European Logarithmic Microprocesor.
IEEE Trans. Computers 57(4): 532-546 (2008) |
| 2007 |
|---|
| 7 | EE | Zdenek Pohl,
Milan Tichý:
RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator for the Microblaze Processor.
FPL 2007: 774-777 |
| 2006 |
|---|
| 6 | EE | Milan Tichý,
Jan Schier,
David Gregg:
Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA.
ARC 2006: 311-316 |
| 5 | EE | Milan Tichý,
Andy Nisbet,
David Gregg:
GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems.
FPGA 2006: 236 |
| 2003 |
|---|
| 4 | EE | Zdenek Pohl,
Rudolf Matousek,
Jiri Kadlec,
Milan Tichý,
Miroslav Lícko:
Lattice adaptive filter implementation for FPGA.
FPGA 2003: 246 |
| 3 | EE | Miroslav Lícko,
Jan Schier,
Milan Tichý,
Markus Kühl:
MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping.
FPL 2003: 984-987 |
| 2 | EE | Zdenek Pohl,
Jan Schier,
Miroslav Lícko,
Antonin Hermanek,
Milan Tichý,
Rudolf Matousek,
Jiri Kadlec:
Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping.
IPDPS 2003: 190 |
| 2002 |
|---|
| 1 | EE | Rudolf Matousek,
Milan Tichý,
Zdenek Pohl,
Jiri Kadlec,
Christopher I. Softley,
Nick Coleman:
Logarithmic Number System and Floating-Point Arithmetics on FPGA.
FPL 2002: 627-636 |
