2004 |
6 | | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Vikram Saxena,
Steven Parkes,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
David Zaretsky,
R. Anderson,
J. R. Uribe:
Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
IEEE Trans. VLSI Syst. 12(3): 312-324 (2004) |
2003 |
5 | EE | Prithviraj Banerjee,
Debabrata Bagchi,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
R. Uribe:
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design.
FCCM 2003: 263-264 |
4 | EE | Prithviraj Banerjee,
Vikram Saxena,
J. R. Uribe,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
R. Anderson:
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.
FPGA 2003: 237 |
2002 |
3 | EE | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi:
A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs.
IWDC 2002: 246-256 |
2000 |
2 | EE | Victor Kim,
Prithviraj Banerjee,
Kaushik De:
Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations.
ICPP 2000: 421- |
1998 |
1 | EE | Victor Kim,
Prithviraj Banerjee:
Parallel Algorithms for Power Estimation.
DAC 1998: 672-677 |