John A. Chandy

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33EETina Miriam John, Anuradharthi Thiruvenkata Ramani, John A. Chandy: Active storage using object-based devices. CLUSTER 2008: 472-478
32EEJohn A. Chandy, Faquir C. Jain: Multiple Valued Logic Using 3-State Quantum Dot Gate FETs. ISMVL 2008: 186-190
31EEJanardhan Singaraju, John A. Chandy: FPGA based string matching for network processing applications. Microprocessors and Microsystems - Embedded Hardware Design 32(4): 210-222 (2008)
30EEJohn A. Chandy: RAID0.5: design and implementation of a low cost disk array data protection method. The Journal of Supercomputing 46(2): 108-123 (2008)
29EEJohn A. Chandy: Dual actuator logging disk architecture and modeling. Journal of Systems Architecture 53(12): 913-926 (2007)
28EEJohn A. Chandy, Sumit Narayan: Reliability tradeoffs in personal storage systems. Operating Systems Review 41(1): 37-41 (2007)
27EEJohn A. Chandy: Storage Allocation in Unreliable Peer-to-Peer Systems. DSN 2006: 227-236
26 Janardhan Singaraju, John A. Chandy: A Generic Lookup Cache Architecture for Network Processing Applications. ERSA 2006: 247-248
25EEJanardhan Singaraju, John A. Chandy: A generic lookup cache architecture for network processing applications. FPGA 2006: 233
24 John A. Chandy: RAID0.5: Active Data Replication for Low Cost Disk Array Data Protection. PDPTA 2006: 963-969
23EELong Bu, John A. Chandy: A CAM-based keyword match processor architecture. Microelectronics Journal 37(8): 828-836 (2006)
22EEJanardhan Singaraju, Long Bu, John A. Chandy: A Signature Match Processor Architecture for Network Intrusion Detection. FCCM 2005: 235-242
21 Michael P. Kapralos, John A. Chandy: A Quorum Based Content Delivery Architecture. PDPTA 2005: 991-996
20EELong Bu, John A. Chandy: A keyword match processor architecture using content addressable memory. ACM Great Lakes Symposium on VLSI 2004: 372-376
19EELong Bu, John A. Chandy: FPGA Based Network Intrusion Detection using Content Addressable Memories. FCCM 2004: 316-317
18EEJohn A. Chandy: Parity Redundancy Strategies in a Large Scale Distributed Storage System. MSST 2004: 185-191
17EEJonathan D. Bright, John A. Chandy: A Scalable Architecture for Clustered Network Attached Storage. IEEE Symposium on Mass Storage Systems 2003: 196-206
16 Jonathan D. Bright, John A. Chandy: Data Integrity in a Distributed Storage System. PDPTA 2003: 688-694
15 John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distrib. Comput. 57(1): 64-90 (1999)
14 John A. Chandy, Prithviraj Banerjee: A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD 1997: 621-627
13EEZhaoyun Xing, John A. Chandy, Prithviraj Banerjee: Parallel Global Routing Algorithms for Standard Cells. IPPS 1997: 527-
12EEJohn G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee: Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing 1997: 172-179
11EEJohn A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee: An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. on CAD of Integrated Circuits and Systems 16(4): 398-410 (1997)
10 John A. Chandy, Steven Parkes, Prithviraj Banerjee: Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR 1996: 147-158
9EEJohn A. Chandy, Prithviraj Banerjee: Parallel simulated annealing strategies for VLSI cell placement. VLSI Design 1996: 37-42
8EEKaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee: Parallel algorithms for logic synthesis using the MIS approach. IPPS 1995: 579-585
7 Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su: The Paradigm Compiler for Distributed-Memory Multicomputers. IEEE Computer 28(10): 37-47 (1995)
6 Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee: Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP 1994: 1-10
5 Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy: ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS 1994: 932-941
4EESteven Parkes, John A. Chandy, Prithviraj Banerjee: A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC 1994: 69-78
3 John A. Chandy, A. L. Narasimha Reddy: Failure Evaluation of Disk Array Organizations. ICDCS 1993: 319-326
2 John A. Chandy, Prithviraj Banerjee: Reliability Evalutaion of Disk Array Architectures. ICPP 1993: 263-267
1 A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee: Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distrib. Comput. 17(1-2): 28-40 (1993)

Coauthor Index

1Prithviraj Banerjee (Prith Banerjee) [1] [2] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
2Jonathan D. Bright [16] [17]
3Long Bu [19] [20] [22] [23]
4Kaushik De [8]
5Manish Gupta [7]
6Gagan Hasteer [12]
7Eugene W. Hodges IV [7]
8John G. Holm [7] [12]
9Faquir C. Jain [32]
10Tina Miriam John [33]
11Michael P. Kapralos [21]
12Sungho Kim [5] [11]
13Venkatram Krishnaswamy [12]
14Antonio Lain [7]
15Sumit Narayan [28]
16Daniel J. Palermo [6] [7]
17Steven Parkes [4] [5] [8] [10] [11] [12]
18Anuradharthi Thiruvenkata Ramani [33]
19Shankar Ramaswamy [7]
20Balkrishna Ramkumar [5] [11]
21A. L. Narasimha Reddy [1] [3]
22Sumit Roy [8] [12]
23Janardhan Singaraju [22] [25] [26] [31]
24Ernesto Su [6] [7]
25Zhaoyun Xing [13]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)