2008 |
33 | EE | Tina Miriam John,
Anuradharthi Thiruvenkata Ramani,
John A. Chandy:
Active storage using object-based devices.
CLUSTER 2008: 472-478 |
32 | EE | John A. Chandy,
Faquir C. Jain:
Multiple Valued Logic Using 3-State Quantum Dot Gate FETs.
ISMVL 2008: 186-190 |
31 | EE | Janardhan Singaraju,
John A. Chandy:
FPGA based string matching for network processing applications.
Microprocessors and Microsystems - Embedded Hardware Design 32(4): 210-222 (2008) |
30 | EE | John A. Chandy:
RAID0.5: design and implementation of a low cost disk array data protection method.
The Journal of Supercomputing 46(2): 108-123 (2008) |
2007 |
29 | EE | John A. Chandy:
Dual actuator logging disk architecture and modeling.
Journal of Systems Architecture 53(12): 913-926 (2007) |
28 | EE | John A. Chandy,
Sumit Narayan:
Reliability tradeoffs in personal storage systems.
Operating Systems Review 41(1): 37-41 (2007) |
2006 |
27 | EE | John A. Chandy:
Storage Allocation in Unreliable Peer-to-Peer Systems.
DSN 2006: 227-236 |
26 | | Janardhan Singaraju,
John A. Chandy:
A Generic Lookup Cache Architecture for Network Processing Applications.
ERSA 2006: 247-248 |
25 | EE | Janardhan Singaraju,
John A. Chandy:
A generic lookup cache architecture for network processing applications.
FPGA 2006: 233 |
24 | | John A. Chandy:
RAID0.5: Active Data Replication for Low Cost Disk Array Data Protection.
PDPTA 2006: 963-969 |
23 | EE | Long Bu,
John A. Chandy:
A CAM-based keyword match processor architecture.
Microelectronics Journal 37(8): 828-836 (2006) |
2005 |
22 | EE | Janardhan Singaraju,
Long Bu,
John A. Chandy:
A Signature Match Processor Architecture for Network Intrusion Detection.
FCCM 2005: 235-242 |
21 | | Michael P. Kapralos,
John A. Chandy:
A Quorum Based Content Delivery Architecture.
PDPTA 2005: 991-996 |
2004 |
20 | EE | Long Bu,
John A. Chandy:
A keyword match processor architecture using content addressable memory.
ACM Great Lakes Symposium on VLSI 2004: 372-376 |
19 | EE | Long Bu,
John A. Chandy:
FPGA Based Network Intrusion Detection using Content Addressable Memories.
FCCM 2004: 316-317 |
18 | EE | John A. Chandy:
Parity Redundancy Strategies in a Large Scale Distributed Storage System.
MSST 2004: 185-191 |
2003 |
17 | EE | Jonathan D. Bright,
John A. Chandy:
A Scalable Architecture for Clustered Network Attached Storage.
IEEE Symposium on Mass Storage Systems 2003: 196-206 |
16 | | Jonathan D. Bright,
John A. Chandy:
Data Integrity in a Distributed Storage System.
PDPTA 2003: 688-694 |
1999 |
15 | | John A. Chandy,
Prithviraj Banerjee:
A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement.
J. Parallel Distrib. Comput. 57(1): 64-90 (1999) |
1997 |
14 | | John A. Chandy,
Prithviraj Banerjee:
A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement.
ICCD 1997: 621-627 |
13 | EE | Zhaoyun Xing,
John A. Chandy,
Prithviraj Banerjee:
Parallel Global Routing Algorithms for Standard Cells.
IPPS 1997: 527- |
12 | EE | John G. Holm,
John A. Chandy,
Steven Parkes,
Sumit Roy,
Venkatram Krishnaswamy,
Gagan Hasteer,
Prithviraj Banerjee:
Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors.
International Conference on Supercomputing 1997: 172-179 |
11 | EE | John A. Chandy,
Sungho Kim,
Balkrishna Ramkumar,
Steven Parkes,
Prithviraj Banerjee:
An evaluation of parallel simulated annealing strategies with application to standard cell placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(4): 398-410 (1997) |
1996 |
10 | | John A. Chandy,
Steven Parkes,
Prithviraj Banerjee:
Distributed Object Oriented Data Structures and Algorithms for VLSI CAD.
IRREGULAR 1996: 147-158 |
9 | EE | John A. Chandy,
Prithviraj Banerjee:
Parallel simulated annealing strategies for VLSI cell placement.
VLSI Design 1996: 37-42 |
1995 |
8 | EE | Kaushik De,
John A. Chandy,
Sumit Roy,
Steven Parkes,
Prithviraj Banerjee:
Parallel algorithms for logic synthesis using the MIS approach.
IPPS 1995: 579-585 |
7 | | Prithviraj Banerjee,
John A. Chandy,
Manish Gupta,
Eugene W. Hodges IV,
John G. Holm,
Antonio Lain,
Daniel J. Palermo,
Shankar Ramaswamy,
Ernesto Su:
The Paradigm Compiler for Distributed-Memory Multicomputers.
IEEE Computer 28(10): 37-47 (1995) |
1994 |
6 | | Daniel J. Palermo,
Ernesto Su,
John A. Chandy,
Prithviraj Banerjee:
Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers.
ICPP 1994: 1-10 |
5 | | Sungho Kim,
Prithviraj Banerjee,
Balkrishna Ramkumar,
Steven Parkes,
John A. Chandy:
ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement.
IPPS 1994: 932-941 |
4 | EE | Steven Parkes,
John A. Chandy,
Prithviraj Banerjee:
A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application.
SC 1994: 69-78 |
1993 |
3 | | John A. Chandy,
A. L. Narasimha Reddy:
Failure Evaluation of Disk Array Organizations.
ICDCS 1993: 319-326 |
2 | | John A. Chandy,
Prithviraj Banerjee:
Reliability Evalutaion of Disk Array Architectures.
ICPP 1993: 263-267 |
1 | | A. L. Narasimha Reddy,
John A. Chandy,
Prithviraj Banerjee:
Design and Evaluation of Gracefully Degradable Disk Arrays.
J. Parallel Distrib. Comput. 17(1-2): 28-40 (1993) |