ICCD 1996:
Austin,
Texas,
USA
1996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings.
IEEE Computer Society 1996, ISBN 0-8186-7554-3 BibTeX
@proceedings{DBLP:conf/iccd/1996,
title = {1996 International Conference on Computer Design (ICCD '96),
VLSI in Computers and Processors, October 7-9, 1996, Austin,
TX, USA, Proceedings},
publisher = {IEEE Computer Society},
year = {1996},
isbn = {0-8186-7554-3},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Verification
- Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich:
Enhancing FSM Traversal by Temporary Re-Encoding.
6-11
Electronic Edition (IEEE Computer Society DL) BibTeX
- Ramin Hojati, Sriram C. Krishnan, Robert K. Brayton:
Early Quantification and Partitioned Transition Relations.
12-19
Electronic Edition (IEEE Computer Society DL) BibTeX
- Michel Langevin, Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Eduard Cerny:
Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration.
20-26
Electronic Edition (IEEE Computer Society DL) BibTeX
- Valeria Bertacco, Maurizio Damiani:
Boolean Function Representation Based on Disjoint-Support Decompositions.
27-
Electronic Edition (IEEE Computer Society DL) BibTeX
Design for Test
Opportunities and Pitfalls in HDL-Based System Design
Issues on the Architecture and the Design of Distributed Shared Memory Systems
Novel Aspects of Scheduling
Multimedia Systems
System Design Aspect
Processor Design Verification
Design and Test Plenary
Data Communication
Design Automation for Embedded Systems
Branch Predictio
Automatic Test Pattern Generation
VLSI Layou
- Steven P. Larcombe, David J. Prendergast, Neil A. Thacker, Peter A. Ivey:
Using Genetic Algorithms to Automate System Implementation in a Novel Three-Dimensional Packaging Technolog.
274-279
Electronic Edition (IEEE Computer Society DL) BibTeX
- J. Kampe, C. Wisser, G. Scarbata:
Module Generators for a Regular Analog Layout.
280-292
Electronic Edition (link) BibTeX
- Jose Alvarez, Hector Sanchez, Roger Countryman, Mike Alexander, Carmine Nicoletta, Gianfranco Gerosa:
A Scalable Resistor-less PLL Design for PowerPCTM Microprocessors.
293-300
Electronic Edition (link) BibTeX
- Mauricio Breternitz Jr., A. Manikonda, M. Ommerman, W. Su, A. Thornto:
Design Tradeoffs and Experience with Motorola PowerPC? Migration Tool.
301-
Electronic Edition (link) BibTeX
Embedded Systems Tutorial
VLSI Technology and Design
Special Session
Architecture Plenar
Minimization Techniques
Future Asynchronous Designs
Sequential Synthesis
Integration Support
Performance Analysis and Validation
VLSI Signal Processors
Architectural Issues in High Level Synthesis
Arithmetic Circuits
Synthesis for FPGAs
Copyright © Sat May 16 23:16:38 2009
by Michael Ley (ley@uni-trier.de)