2004 |
5 | | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Vikram Saxena,
Steven Parkes,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
David Zaretsky,
R. Anderson,
J. R. Uribe:
Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
IEEE Trans. VLSI Syst. 12(3): 312-324 (2004) |
2003 |
4 | EE | Prithviraj Banerjee,
Vikram Saxena,
J. R. Uribe,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
R. Anderson:
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.
FPGA 2003: 237 |
2002 |
3 | EE | Vikram Saxena,
Farid N. Najm,
Ibrahim N. Hajj:
Estimation of state line statistics in sequential circuits.
ACM Trans. Design Autom. Electr. Syst. 7(3): 455-473 (2002) |
1997 |
2 | EE | Vikram Saxena,
Farid N. Najm,
Ibrahim N. Hajj:
Monte-Carlo approach for power estimation in sequential circuits.
ED&TC 1997: 416-420 |
1 | EE | Dilip Krishnaswamy,
Michael S. Hsiao,
Vikram Saxena,
Elizabeth M. Rudnick,
Janak H. Patel,
Prithviraj Banerjee:
Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation.
VLSI Design 1997: 475-481 |