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Chieng-Fai Lim

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1993
1 Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga: A Shared Memory Parallel Algorithm for Logic Synthesis. VLSI Design 1993: 317-322

Coauthor Index

1Prithviraj Banerjee (Prith Banerjee) [1]
2Kaushik De [1]
3Saburo Muroga [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)