| 2009 |
| 43 | EE | Ioana Burcea,
Andreas Moshovos:
Phantom-BTB: a virtualized branch target buffer design.
ASPLOS 2009: 313-324 |
| 42 | EE | Thomas F. Wenisch,
Michael Ferdman,
Anastasia Ailamaki,
Babak Falsafi,
Andreas Moshovos:
Practical off-chip meta-data for temporal memory streaming.
HPCA 2009: 79-90 |
| 2008 |
| 41 | | Andreas Moshovos,
David Tarditi,
Kunle Olukotun:
17th International Conference on Parallel Architecture and Compilation Techniques (PACT 2008), Toronto, Ontario, Canada, October 25-29, 2008
ACM 2008 |
| 40 | EE | Ioana Burcea,
Stephen Somogyi,
Andreas Moshovos,
Babak Falsafi:
Predictor virtualization.
ASPLOS 2008: 157-167 |
| 39 | EE | Patrick Akl,
Andreas Moshovos:
Turbo-ROB: A Low Cost Checkpoint/Restore Accelerator.
HiPEAC 2008: 258-272 |
| 38 | EE | Thomas F. Wenisch,
Michael Ferdman,
Anastasia Ailamaki,
Babak Falsafi,
Andreas Moshovos:
Temporal streams in commercial server applications.
IISWC 2008: 99-108 |
| 37 | EE | Elham Safi,
Andreas Moshovos,
Andreas G. Veneris:
A physical level study and optimization of CAM-based checkpointed register alias table.
ISLPED 2008: 233-236 |
| 36 | EE | Michael Ferdman,
Thomas F. Wenisch,
Anastasia Ailamaki,
Babak Falsafi,
Andreas Moshovos:
Temporal instruction fetch streaming.
MICRO 2008: 1-10 |
| 35 | EE | Elham Safi,
Andreas Moshovos,
Andreas G. Veneris:
L-CBF: A Low-Power, Fast Counting Bloom Filter Architecture.
IEEE Trans. VLSI Syst. 16(6): 628-638 (2008) |
| 2007 |
| 34 | EE | Thomas F. Wenisch,
Anastassia Ailamaki,
Babak Falsafi,
Andreas Moshovos:
Mechanisms for store-wait-free multiprocessors.
ISCA 2007: 266-277 |
| 33 | EE | Elham Safi,
Patrick Akl,
Andreas Moshovos,
Andreas G. Veneris,
Aggeliki Arapoyanni:
On the latency, energy and area of checkpointed, superscalar register alias tables.
ISLPED 2007: 379-382 |
| 32 | EE | Jason Zebchuk,
Elham Safi,
Andreas Moshovos:
A Framework for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy.
MICRO 2007: 314-327 |
| 31 | EE | Jason Zebchuk,
Andreas Moshovos:
A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy.
Computer Architecture Letters 6(2): 33-36 (2007) |
| 2006 |
| 30 | EE | Patrick Akl,
Andreas Moshovos:
BranchTap: improving performance with very few checkpoints through adaptive speculation control.
ICS 2006: 36-45 |
| 29 | EE | Stephen Somogyi,
Thomas F. Wenisch,
Anastassia Ailamaki,
Babak Falsafi,
Andreas Moshovos:
Spatial Memory Streaming.
ISCA 2006: 252-263 |
| 28 | EE | Elham Safi,
Andreas Moshovos,
Andreas G. Veneris:
L-CBF: a low-power, fast counting bloom filter architecture.
ISLPED 2006: 250-255 |
| 27 | EE | Jason F. Cantin,
James E. Smith,
Mikko H. Lipasti,
Andreas Moshovos,
Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays.
IEEE Micro 26(1): 70-79 (2006) |
| 2005 |
| 26 | EE | Won-Ho Park,
Andreas Moshovos,
Babak Falsafi:
RECAST: Boosting Tag Line Buffer Coverage in Low-Power High-Level Caches "for Free".
ICCD 2005: 609-616 |
| 25 | EE | Andreas Moshovos,
Alexandros Kostopoulos:
Memory State Compressors for Giga-Scale Checkpoint/Restore.
IEEE PACT 2005: 303-314 |
| 24 | EE | Andreas Moshovos:
RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence.
ISCA 2005: 234-245 |
| 23 | EE | Andreas Moshovos,
Babak Falsafi,
Farid N. Najm,
Navid Azizi:
A Case for Asymmetric-Cell Cache Memories.
IEEE Trans. VLSI Syst. 13(7): 877-881 (2005) |
| 2004 |
| 22 | EE | Chi F. Chen,
Se-Hyun Yang,
Babak Falsafi,
Andreas Moshovos:
Accurate and Complexity-Effective Spatial Pattern Prediction.
HPCA 2004: 276-287 |
| 21 | EE | Amirali Baniasadi,
Andreas Moshovos:
SEPAS: a highly accurate energy-efficient branch predictor.
ISLPED 2004: 38-43 |
| 2003 |
| 20 | EE | Andreas Moshovos:
Checkpointing alternatives for high performance, power-aware processors.
ISLPED 2003: 318-321 |
| 19 | EE | Ahmed Abdelkhalek,
Angelos Bilas,
Andreas Moshovos:
Behavior and Performance of Interactive Multi-Player Game Servers.
Cluster Computing 6(4): 355-366 (2003) |
| 18 | EE | Navid Azizi,
Farid N. Najm,
Andreas Moshovos:
Low-leakage asymmetric-cell SRAM.
IEEE Trans. VLSI Syst. 11(4): 701-715 (2003) |
| 2002 |
| 17 | EE | Amirali Baniasadi,
Andreas Moshovos:
Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors.
ICCD 2002: 458-461 |
| 16 | EE | Amirali Baniasadi,
Andreas Moshovos:
Asymmetric-frequency clustering: a power-aware back-end for high-performance processors.
ISLPED 2002: 255-258 |
| 15 | EE | Navid Azizi,
Andreas Moshovos,
Farid N. Najm:
Low-leakage asymmetric-cell SRAM.
ISLPED 2002: 48-51 |
| 14 | EE | Andreas Moshovos,
Gurindar S. Sohi:
Reducing Memory Latency via Read-after-Read Memory Dependence Prediction.
IEEE Trans. Computers 51(3): 313-326 (2002) |
| 2001 |
| 13 | EE | Andreas Moshovos,
Gokhan Memik,
Babak Falsafi,
Alok N. Choudhary:
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers.
HPCA 2001: 85-96 |
| 12 | EE | Andreas Moshovos,
Dionisios N. Pnevmatikatos,
Amirali Baniasadi:
Slice-processors: an implementation of operation-based prediction.
ICS 2001: 321-334 |
| 11 | EE | Amirali Baniasadi,
Andreas Moshovos:
Instruction flow-based front-end throttling for power-aware high-performance processors.
ISLPED 2001: 16-21 |
| 2000 |
| 10 | EE | Andreas Moshovos,
Gurindar S. Sohi:
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors.
HPCA 2000: 301-312 |
| 9 | EE | Zhi Alex Ye,
Andreas Moshovos,
Scott Hauck,
Prithviraj Banerjee:
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit.
ISCA 2000: 225-235 |
| 8 | EE | Amirali Baniasadi,
Andreas Moshovos:
Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors.
MICRO 2000: 337-347 |
| 7 | EE | Andreas Moshovos,
Gurindar S. Sohi:
Memory Dependence Prediction in Multimedia Applications.
J. Instruction-Level Parallelism 2: (2000) |
| 1999 |
| 6 | EE | Amir Roth,
Andreas Moshovos,
Gurindar S. Sohi:
Improving virtual function call target prediction via dependence-based pre-computation.
International Conference on Supercomputing 1999: 356-364 |
| 5 | EE | Andreas Moshovos,
Gurindar S. Sohi:
Read-After-Read Memory Dependence Prediction.
MICRO 1999: 177-185 |
| 4 | | Andreas Moshovos,
Gurindar S. Sohi:
Speculative Memory Cloaking and Bypassing.
International Journal of Parallel Programming 27(6): 427-456 (1999) |
| 1998 |
| 3 | EE | Amir Roth,
Andreas Moshovos,
Gurindar S. Sohi:
Dependance Based Prefetching for Linked Data Structures.
ASPLOS 1998: 115-126 |
| 1997 |
| 2 | EE | Andreas Moshovos,
Scott E. Breach,
T. N. Vijaykumar,
Gurindar S. Sohi:
Dynamic Speculation and Synchronization of Data Dependences.
ISCA 1997: 181-193 |
| 1 | EE | Andreas Moshovos,
Gurindar S. Sohi:
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction.
MICRO 1997: 235-245 |