ICPP 1988: The Pennsylvania State University, University Park, PA, USA

Proceedings of the International Conference on Parallel Processing, ICPP '88, The Pennsylvania State University, University Park, PA, USA, August 1988, ISBN 0-271-00654-4, Volume 1: Architecture

Distributed Systems

S. Wayne Bollinger, Scott F. Midkiff: Processor and Link Assignment in Multicomputers Using Simulated Annealing. 1-7 BibTeX
Laxmikant V. Kalé: Comparing the Performance of Two Dynamic Load Distribution Methods. 8-12 BibTeX
Ravi Varadarajan: An Approximate Load Balancing Model with Resource Migration in Distributed Systems. 13-17 BibTeX
Kazuaki Rokusawa, Nobuyuki Ichiyoshi, Takashi Chikayama, Hiroshi Nakashima: An Efficient Termination Detection and Abortion Algorithm for Distributed Processing Systems. 18-22 BibTeX
D. N. Jayasimha: Distributed Synchronizers. 23-27 BibTeX

Systolic Arrays I

Jaime H. Moreno, Tomás Lang: Graph-based Partitioning of Matrix Algorithms for Systolic Arrays: Application to Transitive Closure. 28-31 BibTeX
Ping-Sheng Tseng: Sparse Matrix Computations on Warp. 32-38 BibTeX
Viktor K. Prasanna, Yu-Chen Tsai: Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays and Applications. 39-46 BibTeX
Bard Tokerud, Vidar S. Anderson, Morton Toverud: CESAR: The Architecture and Implementation of a High Performance Systolic Array Processor. 47-50 BibTeX

Logic Design and Tools

Alex Kondratyev, Leonid Ya. Rosenblum, Alexandre Yakovlev: Signal Graphs: A Model for Designing Concurrent Logic. 51-54 BibTeX
Kai Hwang, Ahmed Louri: Optical Arithmetic Using Signed-Digit Symbolic Substitution. 55-64 BibTeX
Steven P. Smith, Bill Underwood, Joe Newman: An Analysis of Parallel Logic Simulation on Several Architectures. 65-68 BibTeX
Zebo Peng: Semantics of a Parallel Computation Model and its Applications in Digital Hardware Design. 69-73 BibTeX
Sumit Ghosh, Meng-Lin Yu: An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors. 74-77 BibTeX

Meshes

Teemu Kerola, Alfred C. Hartmann: Operational Analysis on Hyper-Rectangulars. 78-82 BibTeX
Jianjian Song, Larry L. Kinney: Distributed Termination on a Mesh. 83-85 BibTeX
Abdol-Hossein Esfahanian, Lionel M. Ni, Bruce E. Sagan: On Enhancing Hypercube Multiprocessors. 86-89 BibTeX
Seth Abraham, Krishnan Padmanabhan: Reliability of the Hypercube. 90-94 BibTeX
Mi Lu: Solving Visibility Problems on MCC's. 95-102 BibTeX

Multiprocessor Issues

Meera Balakrishnan, Rajiv Jain, C. S. Raghavendra: On Array Storage for Conflict-Free Memory Access for Parallel Processors. 103-107 BibTeX
Constantine D. Polychronopoulos: The Impact of Run-Time Overhead on Usable Parallelism. 108-112 BibTeX
Jon A. Solworth: The Microflow Architecture. 113-117 BibTeX
Christoph Scheurich, Michel Dubois: Concurrent Miss Resolution in Multiprocessor Caches. 118-125 BibTeX
Anselmo Lastra, C. Frank Starmer: POET: A Tool for the Analysis of the Performance of Parallel Algorithms. 126-129 BibTeX

Multiprocessor Cache Coherence

Qing Yang, Laxmi N. Bhuyan: A Queueing Network Model for a Cache Coherence Protocol on Multiple-bus Multiprocessors. 130-137 BibTeX
Hoichi Cheong, Alexander V. Veidenbaum: Stale Data Detection and Coherence Enforcement Using Flow Analysis. 138-145 BibTeX
Michel Dubois, Jin-Chin Wang: Shared Data Contention in a Cache Coherence Protocol. 146-155 BibTeX

Multiprocessor Performance

Thomas L. Sterling, Albert J. Musciano, Donald J. Becker: Multiprocessor Performance Measurement Using Embedded Instrumentation. 156-165 BibTeX
Santosh G. Abraham, Timothy A. Davis: Blocking for Parallel Sparse Linear System Solvers. 166-173 BibTeX
Robert T. Dimpsey, Ravishankar K. Iyer: Performance Analysis of a Shared Memory Multiprocessor: Case Study. 174-181 BibTeX

Networks

Ravi Mukkamala, Roger K. Shultz: Performance Comparision of Two Multiprocessor B-Link Tree Implementations. 182-186 BibTeX
Jean-Claude Bermond, Jean-Michel Fourneau: Independent Connections: An Easy Characterization of Baseline-Equivalent Multistage Interconnection Networks. 187-190 BibTeX
Tomás Lang, Lance Kurisaki: Nonuniform Traffic Spots in Multistage Interconnection Networks. 191-195 BibTeX
Rajendra V. Boppana, C. S. Raghavendra: On Self Routing in Benes and Shuffle Exchange Networks. 196-200 BibTeX
Gyungho Lee, Sizheng Wei: Design and Analysis of A Fault-Tolerant Multistage Interconnection Network for Large-Scale Shared Memory Parallel Computers. 201-204 BibTeX
Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout: Data Movement Operations and Applications on Reconfigurable VLSI Arrays. 205-208 BibTeX

Dataflow I

Kaoru Uchida, Tsutomu Temma: A Pipelined Dataflow Processor Architecture Based on the Variable Length Token Concept. 209-216 BibTeX
Philip C. Chao, Ming Y. Chern: A Dynamic Dataflow Architecture for Image Generation. 217-224 BibTeX
Thomas L. Sterling, Ellery Y. Chan: A Practical Static Data Flow Computer Based on Associative Methods. 225-234 BibTeX

Dataflow II

Peter M. Maurer: Mapping the Data Flow Model of Computation into an Enhanced Von Neumann Processor. 235-239 BibTeX
Israel Gottlieb: Dynamic Structured Dataflow Preserving the Advantages of Sequential Processing in a Data Driven Environment. 240-243 BibTeX
Paraskevas Evripidou, Jean-Luc Gaudiot: Iterative Algorithms in a Data-Driven Environment. 244-248 BibTeX
Shiann-Ning Jean, Chih-Wei Jim Chang, Sun-Yuan Kung: Graceful Degradation Schemes for Static/Dynamic Wavefront Arrays. 249-255 BibTeX
Jean-Luc Gaudiot, Sukhan Lee, Andrew Sohn: Data-Driven Multiprocessor Implementation of the Rete Match Algorithm. 256-260 BibTeX

Parallelism

Anthony P. Reeves, Maria Gutierrez: On Measuring the Performance of a Massively Parallel Processor. 261-270 BibTeX
Anoop Gupta, Charles Forgy, Dirk Kalp, Allen Newell, Milind Tambe: Parallel OPS5 on the Encore Multimax. 71-280 BibTeX
Lawrence Snyder: A Taxonomy of Synchronous Parallel Machines. 281-285 BibTeX
Won Ho Chung, Ha Ryoung Oh, Hyung Lee-Kwang, Kyu Ho Park, Myunghwan Kim: Parallel Execution Schemes in a Petri Net. 286-290 BibTeX

Commercial Systems

Hideo Wada, Koichi Ishii, Shigeko Yazawa, Shun Kawabe: High-Speed Vector Instruction Execution Schemes of HITACHI Supercomputer S-820 System. 291-298 BibTeX
Donald A. Calahan: Characterization of Memory Conflict Loading on the CRAY-2. 299-302 BibTeX
Tom Lovett, Shreekant S. Thakkar: The Symmetry Multiprocessor System. 303-310 BibTeX
Steven K. Reinhardt: Two Parallel Processing Aspects of the Cray Y-MP Computer System. 311-314 BibTeX

Hypercubes

Shyh-Kwei Chen, Chungti Liang, Wei-Tek Tsai: Loops and Multi-Dimensional Grids on Hypercubes Mapping and Reconfiguration Algorithms. 315-322 BibTeX
Laurence Boxer, Russell B. Miller: Dynamic Computational Geometry on Meshes and Hypercubes. 323-330 BibTeX
A. L. Narasimha Reddy, Prithviraj Banerjee: I/O Embedding in Hypercubes. 331-338 BibTeX

Fault Tolerance

Sreejit Chakravarty, Shambhu J. Upadhyaya: A Unified Approach to Designing Fault-Tolerant Processor Ensembles. 339-342 BibTeX
Seyed H. Hosseini: Fault-Tolerant Scheduling of Independent Tasks and Concurrent Fault-Diagnosis in Multiple Processor Systems. 343-350 BibTeX
Miroslaw Malek, Kitty H. Yau: The Resiliency Triple in Multiprocessor Systems. 351-358 BibTeX
Jing-Yang Jou, Jacob A. Abraham: Fault-Tolerant Algorithms and Architectures for Real Time Signal Processing. 359-362 BibTeX

Systolic Arrays II

Kam-Hoi Cheng: Efficient Designs of Priority Queue. 363-366 BibTeX
Nam Ling, Magdy A. Bayoumi: Algorithms for High Speed Multi-Dimensional Arithmetic and DSP Systolic Arrays. 367-374 BibTeX
Hee Yong Youn, Adit D. Singh: A Highly Efficient Design for Reconfiguring the Processor Array in VLSI. 375-382 BibTeX
Alok N. Choudhary, Janak H. Patel: A Parallel Processing Architecture for an Integrated Vision System. 383-387 BibTeX

Reliability

Kuo-Qin Yan, Yeh-Hao Chin: An Optimal Solution for Consensus Problem in an Unreliable Communications System. 388-391 BibTeX
John J. Macaluso, Chita R. Das, Woei Lin: A Reliability Predictor for MIN-connected Multiprocessor Systems. 392-399 BibTeX
Chung-Yang Chiang, Chuan-lin Wu: Adaptive Checkpointing and Rollback in Multiprocessor Systems. 400-403 BibTeX
Subhasish G. Mitra, Ravishankar K. Iyer: Measurement-Based Analysis of Multiple Latent Errors and Near-coincident Fault Discovery in a Shared Memory Multiprocessor. 404-409 BibTeX

Logic Programming and Pipelined Systems

Uri Baron, Bounthara Ing, Michael Ratcliffe, Philippe Robert: A Distributed Architecture for the PEPSys Parallel Logic Programming System. 410-413 BibTeX
A. V. S. Sastry, Lalit M. Patnaik: A Dataflow Architecture for OR-Parallel Execution of Logic Programs. 414-421 BibTeX
David T. Harper III, Darel A. Linebarger: Storage Schemes for Efficient Computation of a Radix 2 FFT in a Machine with Parallel Memories. 422-425 BibTeX
Lingtao Wang, Chuan-lin Wu: Distributed Instruction Set Computer. 426-429 BibTeX
David Bernstein: An Improved Approximation Algorithm for Scheduling Pipelined Machines. 430-433 BibTeX

Reconfigurable Systems

Ramesh Krishnamurti, Eva Ma: The Processor Partitioning Problem In Special-Purpose Partitionable Systems. 434-443 BibTeX
Samuel A. Fineberg, Thomas L. Casavant, Thomas Schwederski, Howard Jay Siegel: Non-Deterministic Instruction Time Experiments on the PASM System Prototype. 444-451 BibTeX
Myung Hoon Sunwoo, J. K. Aggarwal: Flexibly Coupled Multiprocessors for Image Processing. 452-461 BibTeX