Volume 35,
Number 1,
January 1986
Correspondence
Volume 35,
Number 2,
February 1986
Correspondence
Volume 35,
Number 3,
March 1986
Correspondence
Volume 35,
Number 4,
April 1986
Correspondence
Volume 35,
Number 5,
May 1986
- Jacek Blazewicz, Mieczyslaw Drabowski, Jan Weglarz:
Scheduling Multiprocessor Tasks to Minimize Schedule Length.
389-393 BibTeX
- Dimitris Nikolos, Nikolaos Gaitanis, George Philokyprou:
Systematic t-Error Correcting/All Unidirectional Error Detecting Codes.
394-402 BibTeX
- Jeffrey Scott Vitter, Roger A. Simons:
New Classes for Parallel Complexity: A Study of Unification and Other Complete Problems for P.
403-418 BibTeX
- Edmundo de Souza e Silva, Stephen S. Lavenberg, Richard R. Muntz:
A Clustering Approximation Technique for Queueing Network Models with a Large Number of Chains.
419-430 BibTeX
- H. V. Jagadish, Robert G. Mathews, Thomas Kailath, John A. Newkirk:
A Study of Pipelining in Computing Arrays.
431-440 BibTeX
- Ivor P. Page, Jeff Hagins:
Improving the Performance of Buddy Systems.
441-447 BibTeX
- C. Mani Krishna, Kang G. Shin:
On Scheduling Tasks with a Quick Recovery from Failure.
448-455 BibTeX
- Wayne A. Davis, De-Lei Lee:
Fas Search Algorithms for Associative Memories.
456-461 BibTeX
- Vijaya Ramachandran:
Algorithmic Aspects of MOS VLSI Switch-Level Simulation with Race Detection.
462-475 BibTeX
,
Correction:
IEEE Transactions on Computer 35(9):
851 (1986)
Correspondence
Volume 35,
Number 6,
June 1986
Correspondence
Volume 35,
Number 7,
July 1986
Correspondence
Volume 35,
Number 8,
August 1986
Correspondence
Volume 35,
Number 9,
September 1986
Correspondence
Volume 35,
Number 10,
October 1986
Correspondence
- Balakrishna R. Iyer, Lorenzo Donatiello, Philip Heidelberger:
Analysis of Performability for Stochastic Models of Fault-Tolerant Systems.
902-907 BibTeX
- James R. Goodman, Honesty C. Young:
Comments on ``A Massive Memory Machine''.
907-910 BibTeX
- Woei Lin, Chuan-lin Wu:
Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor.
910-916 BibTeX
- Gregory E. Bridges, Werner Pries, Robert D. McLeod, M. Yunik, P. Glenn Gulak, Howard C. Card:
Dual Systolic Architectures for VLSI Digital Signal Processing Systems.
916-923 BibTeX
- Elena Lodi, Linda Pagli:
A VLSI Solution to the Vertical Segment Visibility Problem.
923-928 BibTeX
- Raouf N. Gorgui-Naguib, R. A. King:
Comments on "Matrix Processors Using p-Adic Arithmetic for Exact Linear Computations".
928-931 BibTeX
Volume 35,
Number 11,
November 1986
Correspondence
- Peter J. Varman, I. V. Ramakrishnan:
Synthesis of an Optimal Family of Matrix Multiplication Algorithms on Linear Arrays.
989-996 BibTeX
- Thomas E. Fuja, Chris Heegard:
Row/Column Replacement for the Control of Hard Defects in Semiconductor RAM's.
996-1000 BibTeX
- Bhabani P. Sinha, Bhargab B. Bhattacharya, Suranjan Ghose, Pradip K. Srimani:
A Parallel Algorithm to Compute the Shortest Paths and Diameter of a Graph and Its VLSI Implementation.
1000-1004 BibTeX
- Jagannathan Narasimhan, Kazuo Nakajima:
An Algorithm for Determining the Fault Diagnosability of a System.
1004-1008 BibTeX
- Trieu-Kien Truong, J. J. Chang, In-Shek Hsu, D. Y. Pei, Irving S. Reed:
Techniques for Computing the Discrete Fourier Transform Using the Quadratic Residue Fermat Number Systems.
1008-1012 BibTeX
Volume 35,
Number 12,
December 1986
Correspondence
Copyright © Sun May 17 00:22:59 2009
by Michael Ley (ley@uni-trier.de)
