2008 |
14 | EE | Malay Haldar,
Gagandeep Singh,
Saurabh Prabhakar,
Basant Dwivedi,
Antara Ghosh:
Construction of concrete verification models from C++.
DAC 2008: 942-947 |
2004 |
13 | | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Vikram Saxena,
Steven Parkes,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
David Zaretsky,
R. Anderson,
J. R. Uribe:
Overview of a compiler for synthesizing MATLAB programs onto FPGAs.
IEEE Trans. VLSI Syst. 12(3): 312-324 (2004) |
2003 |
12 | EE | Prithviraj Banerjee,
Debabrata Bagchi,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
R. Uribe:
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design.
FCCM 2003: 263-264 |
11 | EE | Prithviraj Banerjee,
Vikram Saxena,
J. R. Uribe,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi,
R. Anderson:
Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs.
FPGA 2003: 237 |
2002 |
10 | EE | Anshuman Nayak,
Malay Haldar,
Alok N. Choudhary,
Prithviraj Banerjee:
Accurate Area and Delay Estimators for FPGAs.
DATE 2002: 862-869 |
9 | EE | Prithviraj Banerjee,
Malay Haldar,
Anshuman Nayak,
Victor Kim,
Debabrata Bagchi,
Satrajit Pal,
Nikhil Tripathi:
A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs.
IWDC 2002: 246-256 |
2001 |
8 | EE | Malay Haldar,
Anshuman Nayak,
Alok N. Choudhary,
Prithviraj Banerjee:
Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB.
ASP-DAC 2001: 645-648 |
7 | EE | Anshuman Nayak,
Malay Haldar,
Alok N. Choudhary,
Prithviraj Banerjee:
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs.
DATE 2001: 722-728 |
6 | EE | Malay Haldar,
Anshuman Nayak,
Alok N. Choudhary,
Prithviraj Banerjee:
A System for Synthesizing Optimized FPGA Hardware from MATLAB.
ICCAD 2001: 314-319 |
5 | EE | Malay Haldar,
Anshuman Nayak,
Alok N. Choudhary,
Prithviraj Banerjee,
U. Nagaraj Shenoy:
Fpga Hardware Synthesis From Matlab.
VLSI Design 2001: 299-304 |
2000 |
4 | EE | Malay Haldar,
Anshuman Nayak,
Alok N. Choudhary,
Prithviraj Banerjee:
Parallel algorithms for FPGA placement.
ACM Great Lakes Symposium on VLSI 2000: 86-94 |
3 | EE | Malay Haldar,
Anshuman Nayak,
Alok N. Choudhary,
Prithviraj Banerjee:
Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB.
CASES 2000: 85-93 |
2 | EE | Prithviraj Banerjee,
U. Nagaraj Shenoy,
Alok N. Choudhary,
Scott Hauck,
C. Bachmann,
Malay Haldar,
Pramod G. Joisha,
Alex K. Jones,
Abhay Kanhere,
Anshuman Nayak,
S. Periyacheri,
M. Walkden,
David Zaretsky:
A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.
FCCM 2000: 39-48 |
1 | EE | Malay Haldar,
Anshuman Nayak,
Abhay Kanhere,
Pramod G. Joisha,
U. Nagaraj Shenoy,
Alok N. Choudhary,
Prithviraj Banerjee:
Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel.
ICPP 2000: 145-152 |