Gang Qu, Yehea I. Ismail, Narayanan Vijaykrishnan, Hai Zhou (Eds.):
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006.
ACM 2006, ISBN 1-59593-347-6 BibTeX
Emerging technologies
- Garrett S. Rose, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, Mircea R. Stan, John C. Bean, Lloyd R. Harriott, Yuxing Yao, James M. Tour:
Design approaches for hybrid CMOS/molecular memory based on experimental device data.
2-7
Electronic Edition (ACM DL) BibTeX
- Rui Zhang, Niraj K. Jha:
Threshold/majority logic synthesis and concurrent error detection targeting nanoelectronic implementations.
8-13
Electronic Edition (ACM DL) BibTeX
- Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, Mahmoud Shahram, Kishore Singhal:
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies.
14-18
Electronic Edition (ACM DL) BibTeX
- Kiran Puttaswamy, Gabriel H. Loh:
Thermal analysis of a 3D die-stacked high-performance microprocessor.
19-24
Electronic Edition (ACM DL) BibTeX
CAD for embedded systems
RF and data communication circuits
Partitioning and floorplanning
Poster session 1
- Xiangyuan Liu, Shuming Chen:
Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning.
91-94
Electronic Edition (ACM DL) BibTeX
- Ayse Kivilcim Coskun, Tajana Simunic Rosing, Yusuf Leblebici, Giovanni De Micheli:
A simulation methodology for reliability analysis in multi-core SoCs.
95-99
Electronic Edition (ACM DL) BibTeX
- Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail:
Power density minimization for highly-associative caches in embedded processors.
100-104
Electronic Edition (ACM DL) BibTeX
- Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. Massoud:
An evaluation of the impact of gate oxide tunneling on dual-Vt-based leakage reduction techniques.
105-110
Electronic Edition (ACM DL) BibTeX
- Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra:
Efficient encoding for address buses with temporal redundancy for simultaneous area and energy reduction.
111-114
Electronic Edition (ACM DL) BibTeX
- Zuying Luo:
General transistor-level methodology on VLSI low-power design.
115-118
Electronic Edition (ACM DL) BibTeX
- K. Najeeb, Vishal Gupta, V. Kamakoti, Madhu Mutyam:
Delay and peak power minimization for on-chip buses using temporal redundancy.
119-122
Electronic Edition (ACM DL) BibTeX
- ZhiYuan Li, FengChang Lai, MingYan Yu:
Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology.
123-126
Electronic Edition (ACM DL) BibTeX
- Fei Yuan:
A new power-area efficient 4-PAM full-clock CMOS pre-emphasis transmitter for 10Gb/s serial links.
127-130
Electronic Edition (ACM DL) BibTeX
- Jun-Da Chen, Zhi-Ming Lin:
A low-power and high-linear double-balanced switching mixer.
131-134
Electronic Edition (ACM DL) BibTeX
- Yarallah Koolivand, Omid Shoaei, A. Fotowat-Ahmadi, Ali Zahabi, Parviz Jabedar-Maralani:
Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series.
135-139
Electronic Edition (ACM DL) BibTeX
- Qianneng Zhou, Fengchang Lai, Mingyan Yu:
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips.
140-143
Electronic Edition (ACM DL) BibTeX
- Hung D. Nguyen, Benjamin J. Blalock, Suheng Chen:
A SiGe BiCMOS linear regulator with wideband, high power supply rejection.
144-148
Electronic Edition (ACM DL) BibTeX
- Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, William R. Patterson, Alexander Zaslavsky:
Optimizing noise-immune nanoscale circuits using principles of Markov random fields.
149-152
Electronic Edition (ACM DL) BibTeX
- Kiran Puttaswamy, Gabriel H. Loh:
Dynamic instruction schedulers in a 3-dimensional integration technology.
153-158
Electronic Edition (ACM DL) BibTeX
- Song Peng, Rajit Manohar:
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology.
159-164
Electronic Edition (ACM DL) BibTeX
- William R. Roberts, Dimitrios Velenis:
Effects of process and environmental variations on timing characteristics of clocked registers.
165-168
Electronic Edition (ACM DL) BibTeX
- Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya:
On finding the minimum test set of a BDD-based circuit.
169-172
Electronic Edition (ACM DL) BibTeX
Circuit design and modeling
High performance VLSI design
Timing optimization
- Hosung (Leo) Kim, John Lillis, Milos Hrkic:
Techniques for improved placement-coupled logic replication.
211-216
Electronic Edition (ACM DL) BibTeX
- Rajesh Garg, Mario Sanchez, Kanupriya Gulati, Nikhil Jayakumar, Anshul Gupta, Sunil P. Khatri:
A design flow to optimize circuit delay by using standard cells and PLAs.
217-222
Electronic Edition (ACM DL) BibTeX
- Andrew B. Kahng, Bao Liu, Xu Xu:
Statistical gate delay calculation with crosstalk alignment consideration.
223-228
Electronic Edition (ACM DL) BibTeX
- Joonsoo Kim, Michael Orshansky:
Towards formal probabilistic power-performance design space exploration.
229-234
Electronic Edition (ACM DL) BibTeX
Testing and noise analysis
- Chuen-Song Chen, Jien-Chung Lo, Tian Xia:
An indirect current sensing technique for IDDQ and IDDT tests.
235-240
Electronic Edition (ACM DL) BibTeX
- Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, Amir H. Ajami, Emre Tuncer:
SACI: statistical static timing analysis of coupled interconnects.
241-246
Electronic Edition (ACM DL) BibTeX
- Vikram Iyengar, Mark Johnson, Theo Anemikos, Bob Bassett, Mike Degregorio, Rudy Farmer, Gary Grise, Phil Stevens, Mark Taylor, Frank Woytowich:
Performance verification of high-performance ASICs using at-speed structural test.
247-252
Electronic Edition (ACM DL) BibTeX
- Shahin Nazarian, Ali Iranli, Massoud Pedram:
Crosstalk analysis in nanometer technologies.
253-258
Electronic Edition (ACM DL) BibTeX
System and architectural-Level VLSI design
Low power design and technology
Poster session 2
- Zhonghai Lu, Mingchen Zhong, Axel Jantsch:
Evaluation of on-chip networks using deflection routing.
296-301
Electronic Edition (ACM DL) BibTeX
- Lun Li, Mitchell A. Thornton, David W. Matula:
A digit serial algorithm for the integer power operation.
302-307
Electronic Edition (ACM DL) BibTeX
- Scott J. Campbell, Sunil P. Khatri:
Resource and delay efficient matrix multiplication using newer FPGA devices.
308-311
Electronic Edition (ACM DL) BibTeX
- Yongmei Dai, Zhiyuan Yan, Ning Chen:
Parallel turbo-sum-product decoder architecture for quasi-cyclic LDPC codes.
312-315
Electronic Edition (ACM DL) BibTeX
- Bo Fu, Qiaoyan Yu, Paul Ampadu:
Energy-delay minimization in nanoscale domino logic.
316-319
Electronic Edition (ACM DL) BibTeX
- Luciano Volcan Agostini, Roger Endrigo Carvalho Porto, Sergio Bampi, Leandro Rosa, José Luís Güntzel, Ivan Saraiva Silva:
High throughput architecture for H.264/AVC forward transforms block.
320-323
Electronic Edition (ACM DL) BibTeX
- Sathish Chandra, Francesco Regazzoni, Marcello Lajolo:
Hardware/software partitioning of operating systems: a behavioral synthesis approach.
324-329
Electronic Edition (ACM DL) BibTeX
- Mohamed H. Zaki, Sofiène Tahar, Guy Bois:
A practical approach for monitoring analog circuits.
330-335
Electronic Edition (ACM DL) BibTeX
- Xu Zhang, Xiaohong Jiang, Susumu Horiguchi:
A non-orthogonal clock distribution network and its performance evaluation in presence of process variations and inductive effects.
336-340
Electronic Edition (ACM DL) BibTeX
- Jinwen Xi, Peixin Zhong:
A Transaction-Level NoC Simulation Platform with Architecture-Level Dynamic and Leakage Energy Models.
341-344
Electronic Edition (ACM DL) BibTeX
- Soumya Pandit, Chittaranjan A. Mandal, Amit Patra:
A formal approach for high level synthesis of linear analog systems.
345-348
Electronic Edition (ACM DL) BibTeX
- Renqiu Huang, Ranga Vemuri:
Transformation synthesis for data intensive applications to FPGAs.
349-352
Electronic Edition (ACM DL) BibTeX
- Mohamed El-Nozahi, Yehia Massoud:
An integrated circuit/behavioral simulation framework for continuous-time sigma-delta ADCs.
353-356
Electronic Edition (ACM DL) BibTeX
- Marios Kalathas, Dimitrios Voudouris, George K. Papakonstantinou:
A heuristic algorithm to minimize ESOPs for multiple-output incompletely specified functions.
357-361
Electronic Edition (ACM DL) BibTeX
- Heon-Mo Koo, Prabhat Mishra:
Test generation using SAT-based bounded model checking for validation of pipelined processors.
362-365
Electronic Edition (ACM DL) BibTeX
- I-Lun Tseng, Adam Postula:
An efficient algorithm for partitioning parameterized polygons into rectangles.
366-371
Electronic Edition (ACM DL) BibTeX
- Murari Mani, Mahesh Sharma, Michael Orshansky:
Application of fast SOCP based statistical sizing in the microprocessor design flow.
372-375
Electronic Edition (ACM DL) BibTeX
- Jill H. Y. Law, Evangeline F. Y. Young, Royce L. S. Ching:
Block alignment in 3D floorplan using layered TCG.
376-380
Electronic Edition (ACM DL) BibTeX
- Paul Sotiriadis, Abdullah Celik, Zhaonian Zhang:
Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling.
381-385
Electronic Edition (ACM DL) BibTeX
System & architectural-level power optimization
Power aware digital circuits
Copyright © Sat May 16 23:13:51 2009
by Michael Ley (ley@uni-trier.de)
