| |
| 2006 | ||
|---|---|---|
| 2 | EE | Gopal Paul, Ajit Pal, Bhargab B. Bhattacharya: On finding the minimum test set of a BDD-based circuit. ACM Great Lakes Symposium on VLSI 2006: 169-172 |
| 1 | EE | Gopal Paul, S. N. Pradhan, Ajit Pal, Bhargab B. Bhattacharya: Low Power BDD-based Synthesis Using Dual Rail Static DCVSPG Logic. APCCAS 2006: 1504-1507 |
| 1 | Bhargab B. Bhattacharya | [1] [2] |
| 2 | Ajit Pal | [1] [2] |
| 3 | S. N. Pradhan | [1] |