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Renqiu Huang

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2006
9EERenqiu Huang, Ranga Vemuri: Transformation synthesis for data intensive applications to FPGAs. ACM Great Lakes Symposium on VLSI 2006: 349-352
2005
8 Renqiu Huang, Ranga Vemuri: PAHLS: Towards Run-Time Synthesis for FPGAs. FPL 2005: 739-740
7EERenqiu Huang, Ranga Vemuri: Sensitivity Analysis of a Cluster-Based Interconnect Model for FPGAs. ISVLSI 2005: 250-251
6EERenqiu Huang, Ranga Vemuri: On-Line Synthesis for Partially Reconfigurable FPGAs. VLSI Design 2005: 663-668
2004
5 Jawad Khan, Jayanthi Rajagopalan, Renqiu Huang, Ranga Vemuri: A Portable Face Recognition System Using Reconfigurable Hardware. ERSA 2004: 213-217
4EERenqiu Huang, Manish Handa, Ranga Vemuri: Analysis of a Hybrid Interconnect Architecture for Dynamically Reconfigurable FPGAs. FPL 2004: 900-905
3EERenqiu Huang, Ranga Vemuri: Analysis and evaluation of a hybrid interconnect structure for FPGAs. ICCAD 2004: 595-601
2EERenqiu Huang, Ranga Vemuri: Forward-Looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs. IPDPS 2004
2003
1EERenqiu Huang, Tommy Cheung, Ted Kok: A Statistical Analysis Tool for FPLD Architectures. FPL 2003: 1000-1003

Coauthor Index

1Tommy Cheung [1]
2Manish Handa [4]
3Jawad Khan [5]
4Ted Kok [1]
5Jayanthi Rajagopalan [5]
6Ranga Vemuri [2] [3] [4] [5] [6] [7] [8] [9]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)