| 2007 |
|---|
| 6 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits.
DATE 2007: 576-581 |
| 5 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
Designing Nanoscale Logic Circuits Based on Markov Random Fields.
J. Electronic Testing 23(2-3): 255-266 (2007) |
| 2006 |
|---|
| 4 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
Optimizing noise-immune nanoscale circuits using principles of Markov random fields.
ACM Great Lakes Symposium on VLSI 2006: 149-152 |
| 3 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
Designing MRF based error correcting circuits for memory elements.
DATE 2006: 792-793 |
| 2 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
MRF Reinforcer: A Probabilistic Element for Space Redundancy in Nanoscale Circuits.
IEEE Micro 26(5): 19-27 (2006) |
| 2005 |
|---|
| 1 | EE | Kundan Nepal,
R. Iris Bahar,
Joseph L. Mundy,
William R. Patterson,
Alexander Zaslavsky:
Designing logic circuits for probabilistic computation in the presence of noise.
DAC 2005: 485-490 |
