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Krishnan Sundaresan

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2008
13EEKrishnan Sundaresan, Nihar R. Mahapatra: Interconnect Signaling and Layout Optimization to Manage Thermal Effects Due to Self Heating in On-Chip Signal Buses. ISQED 2008: 118-122
2007
12EEKrishnan Sundaresan, Nihar R. Mahapatra: An Analysis of Timing Violations Due to Spatially Distributed Thermal Effects in Global Wires. DAC 2007: 515-520
2006
11EEJiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra: Efficient encoding for address buses with temporal redundancy for simultaneous area and energy reduction. ACM Great Lakes Symposium on VLSI 2006: 111-114
10EEKrishnan Sundaresan, Nihar R. Mahapatra: Value-based bit ordering for energy optimization of on-chip global signal buses. DATE 2006: 624-625
9EEJiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra: Fast, Performance-Optimized Partial Match Address Compression for Low-Latency On-Chip Address Buses. ICCD 2006
2005
8EEKrishnan Sundaresan, Nihar R. Mahapatra: Accurate Energy Dissipation and Thermal Modeling for Nanometer-Scale Buses. HPCA 2005: 51-60
7EEJiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra: Energy-Efficient Compressed Address Transmission. VLSI Design 2005: 592-597
6EEKrishnan Sundaresan, Nihar R. Mahapatra: An Accurate Energy and Thermal Model for Global Signal Buses. VLSI Design 2005: 685-690
2004
5EEJiangjiang Liu, Krishnan Sundaresan, Nihar R. Mahapatra: Dynamic Address Compression Schemes: A Performance, Energy, and Cost Study. ICCD 2004: 458-463
2003
4EENihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan: Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis. ICCD 2003: 234-239
3EEJiangjiang Liu, Nihar R. Mahapatra, Krishnan Sundaresan: Hardware-Only Compression to Reduce Cost and Improve Utilization of Address Buses. ISVLSI 2003: 220-221
2EEKrishnan Sundaresan, Nihar R. Mahapatra: Code Compression Techniques for Embedded Systems and Their Effectiveness. ISVLSI 2003: 262-263
2002
1EENihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan: The performance advantage of applying compression to the memory system. MSP/ISMM 2002: 86-96

Coauthor Index

1Jiangjiang Liu [1] [3] [4] [5] [7] [9] [11]
2Nihar R. Mahapatra [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)