| 2008 |
|---|
| 12 | EE | Ja Chun Ku,
Yehea I. Ismail:
Area Optimization for Leakage Reduction and Thermal Stability in Nanometer-Scale Technologies.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 241-248 (2008) |
| 2007 |
|---|
| 11 | EE | Jieyi Long,
Ja Chun Ku,
Seda Ogrenci Memik,
Yehea I. Ismail:
A self-adjusting clock tree architecture to cope with temperature variations.
ICCAD 2007: 75-82 |
| 10 | EE | Ja Chun Ku,
Yehea I. Ismail:
Attaining Thermal Integrity in Nanometer Chips.
ISCAS 2007: 3223-3226 |
| 9 | EE | Ja Chun Ku,
Yehea I. Ismail:
A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay.
ISCAS 2007: 3736-3739 |
| 8 | EE | Ja Chun Ku,
Yehea I. Ismail:
Thermal-aware methodology for repeater insertion in low-power VLSI circuits.
ISLPED 2007: 86-91 |
| 7 | EE | Serkan Ozdemir,
Arindam Mallik,
Ja Chun Ku,
Gokhan Memik,
Yehea I. Ismail:
Variable latency caches for nanoscale processor.
SC 2007: 20 |
| 6 | EE | Ja Chun Ku,
Serkan Ozdemir,
Gokhan Memik,
Yehea I. Ismail:
Thermal Management of On-Chip Caches Through Power Density Minimization.
IEEE Trans. VLSI Syst. 15(5): 592-604 (2007) |
| 5 | EE | Ja Chun Ku,
Yehea I. Ismail:
Thermal-Aware Methodology for Repeater Insertion in Low-Power VLSI Circuits.
IEEE Trans. VLSI Syst. 15(8): 963-970 (2007) |
| 4 | EE | Ja Chun Ku,
Yehea I. Ismail:
On the Scaling of Temperature-Dependent Effects.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1882-1888 (2007) |
| 2006 |
|---|
| 3 | EE | Ja Chun Ku,
Serkan Ozdemir,
Gokhan Memik,
Yehea I. Ismail:
Power density minimization for highly-associative caches in embedded processors.
ACM Great Lakes Symposium on VLSI 2006: 100-104 |
| 2 | EE | Ja Chun Ku,
Yehea I. Ismail:
Area optimization for leakage reduction and thermal stability in nanometer scale technologies.
ASP-DAC 2006: 231-236 |
| 2005 |
|---|
| 1 | EE | Ja Chun Ku,
Serkan Ozdemir,
Gokhan Memik,
Yehea I. Ismail:
Thermal Management of On-Chip Caches Through Power Density Minimization.
MICRO 2005: 283-293 |
