| 2006 |
|---|
| 8 | EE | Yarallah Koolivand,
Omid Shoaei,
A. Fotowat-Ahmadi,
Ali Zahabi,
Parviz Jabedar-Maralani:
Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series.
ACM Great Lakes Symposium on VLSI 2006: 135-139 |
| 2005 |
|---|
| 7 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A two-stage genetic algorithm method for optimization the Sigma-Delta modulators.
ASP-DAC 2005: 1212-1215 |
| 6 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A low-power /spl Delta//spl Sigma/ modulator with low capacitor spread for multi-standard receiver applications.
ISCAS (4) 2005: 3107-3110 |
| 5 | EE | Yarallah Koolivand,
Omid Shoaei,
Ali Zahabi,
Hossein Shamsi,
Parviz Jabedar-Maralani:
A new technique for design CMOS LNA for multi-standard receivers.
ISCAS (4) 2005: 3231-3234 |
| 4 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand:
Design of a Band-Pass Pseudo-2-Path Switched Capacitor Ladder Filter.
ISQED 2005: 662-667 |
| 3 | EE | Yarallah Koolivand,
Omid Shoaei,
Ali Zahabi,
Parviz Jabedar-Maralani:
A complete analysis of noise in inductively source degenerated CMOS LNA's.
IEICE Electronic Express 2(1): 25-31 (2005) |
| 2 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A 2/5mW CMOS Delta Sigma modulator employed in an improved GSM/UMTS receiver structure.
IEICE Electronic Express 2(8): 267-273 (2005) |
| 2004 |
|---|
| 1 | EE | Yarallah Koolivand,
Ali Zahabi,
Nasser Masoumi:
Modeling of polysilicide gate resistance effect on inverter delay and power consumption using distributed RC method and branching technique.
ACM Great Lakes Symposium on VLSI 2004: 149-153 |
