| 2008 |
|---|
| 6 | EE | Gennette Gill,
Vishal Gupta,
Montek Singh:
Performance estimation and slack matching for pipelined asynchronous architectures with choice.
ICCAD 2008: 449-456 |
| 2006 |
|---|
| 5 | EE | K. Najeeb,
Vishal Gupta,
V. Kamakoti,
Madhu Mutyam:
Delay and peak power minimization for on-chip buses using temporal redundancy.
ACM Great Lakes Symposium on VLSI 2006: 119-122 |
| 4 | EE | E. O. Torres,
Min Chen,
H. Pooya Forghani-zadeh,
Vishal Gupta,
Neeraj Keskar,
L. A. Milner,
Hsuan-I Pan,
Gabriel A. Rincón-Mora:
SiP integration of intelligent, adaptive, self-sustaining power management solutions for portable applications.
ISCAS 2006 |
| 3 | EE | K. Najeeb,
Vishal Gupta,
V. Kamakoti,
Madhu Mutyam:
Temporal Redundancy Based Encoding Technique for Peak Power and Delay Reduction of On-Chip Buses.
J. Low Power Electronics 2(3): 425-436 (2006) |
| 2005 |
|---|
| 2 | EE | Vishal Gupta,
Gabriel A. Rincón-Mora:
A low dropout, CMOS regulator with high PSR over wideband frequencies.
ISCAS (5) 2005: 4245-4248 |
| 1 | EE | Vishal Gupta,
Gabriel A. Rincón-Mora:
Predicting and Designing for the Impact of Process Variations and Mismatch on the Trim Range and Yield of Bandgap References.
ISQED 2005: 503-508 |
