| 2008 |
|---|
| 57 | EE | Yarallah Koolivand,
Seyed Morteza Alavi,
Omid Shoaei:
New technique in design of active rf cmos mixers for low flicker noise and high conversion gain.
ACM Great Lakes Symposium on VLSI 2008: 127-130 |
| 56 | EE | Sedigheh Hashemi,
Omid Shoaei:
A 0.9V 10-bit 100 MS/s switched-RC pipelined ADC without using a front-end S/H in 90nm CMOS.
ISCAS 2008: 13-16 |
| 55 | EE | Mohammad B. Vahidfar,
Omid Shoaei:
A CMOS high IIP2 mixer for multi-standard receivers.
ISCAS 2008: 656-659 |
| 54 | EE | Mohammad B. Vahidfar,
Omid Shoaei:
An IIP2 calibration technique for CMOS multi-standard mixers.
ISCAS 2008: 916-919 |
| 53 | EE | Mohammad B. Vahidfar,
Omid Shoaei:
An IIP2 Calibration Technique for Zero-IF Multi Band down Converter Mixer.
IEICE Transactions 91-A(2): 529-534 (2008) |
| 2007 |
|---|
| 52 | EE | Mohammad B. Vahidfar,
Omid Shoaei:
A New Inductor-Less IP2 Enhancement Technique for CMOS Multi-Standard Mixer.
IEICE Transactions 90-C(6): 1234-1240 (2007) |
| 2006 |
|---|
| 51 | EE | Yarallah Koolivand,
Omid Shoaei,
A. Fotowat-Ahmadi,
Ali Zahabi,
Parviz Jabedar-Maralani:
Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series.
ACM Great Lakes Symposium on VLSI 2006: 135-139 |
| 50 | EE | Vahid Majidzadeh,
Omid Shoaei:
A power optimized design methodology for low-distortion sigma-delta-pipeline ADCs.
ACM Great Lakes Symposium on VLSI 2006: 284-289 |
| 49 | EE | Hossein Shamsi,
Omid Shoaei:
Continuous Time Delta-Sigma Modulators with Arbitrary DAC Waveforms.
APCCAS 2006: 187-190 |
| 48 | EE | Hossein Shamsi,
Omid Shoaei:
A New Approach for DAC Non-linearity Compensation in Continuous Time Delta Sigma Modulators.
APCCAS 2006: 191-194 |
| 47 | EE | S. M. Mortazavi Zanjani,
S. Rahimian Omam,
Seid Mehdi Fakhraie,
Omid Shoaei:
Experimental Evaluation of Different Realizations of Recursive CIC Filters.
CCECE 2006: 1056-1059 |
| 46 | EE | Vahid Majidzadeh,
Omid Shoaei:
Arbitrary design of high order noise transfer function for a novel class of reduced-sample-rate sigma-delta-pipeline ADCs.
DATE 2006: 138-143 |
| 45 | EE | Mohammad Yavari,
Omid Shoaei,
Ángel Rodríguez-Vázquez:
Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation.
DATE 2006: 144-149 |
| 44 | EE | Mohammad Yavari,
Omid Shoaei,
Ángel Rodríguez-Vázquez:
Double-sampling single-loop sigma-delta modulator topologies for broadband applications.
DATE 2006: 399-404 |
| 43 | EE | Mohammad B. Vahidfar,
Omid Shoaei,
M. Fardis:
A low power, transverse analog FIR filter for feed forward equalization of gigabit Ethernet.
ISCAS 2006 |
| 42 | EE | Hashem Zare-Hoseini,
Omid Shoaei,
Izzet Kale:
A new structure for capacitor-mismatch-insensitive multiply-by-two amplification.
ISCAS 2006 |
| 41 | EE | Hossein Shamsi,
Omid Shoaei:
A novel structure for the design of 2-1-1 cascaded continuous time delta sigma modulators.
ISCAS 2006 |
| 40 | EE | B. Tavassoli,
Omid Shoaei:
Digital background calibration of pipeline ADC with open-loop gain stage.
ISCAS 2006 |
| 39 | EE | Mohammad Yavari,
Omid Shoaei,
Ángel Rodríguez-Vázquez:
Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios.
ISCAS 2006 |
| 38 | EE | Hossein Shamsi,
Omid Shoaei,
Roghayeh Doost:
Analysis of the Clock Jitter Effects in a Time Invariant Model of Continuous Time Delta Sigma Modulators.
IEICE Transactions 89-A(2): 399-407 (2006) |
| 37 | EE | Hossein Shamsi,
Omid Shoaei:
A New Infrastructure for Digital Pre-Filtering in Multi-bit Continuous Time Delta Sigma Modulators.
IEICE Transactions 89-C(12): 1954-1957 (2006) |
| 36 | EE | Vahid Majidzadeh,
Omid Shoaei:
A Reduced-Sample-Rate Sigma-Delta-Pipeline ADC Architecture for High-Speed High-Resolution Applications.
IEICE Transactions 89-C(6): 692-701 (2006) |
| 2005 |
|---|
| 35 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A two-stage genetic algorithm method for optimization the Sigma-Delta modulators.
ASP-DAC 2005: 1212-1215 |
| 34 | EE | Hashem Zare-Hoseini,
Omid Shoaei,
Izzet Kale:
A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatch.
ISCAS (2) 2005: 1409-1412 |
| 33 | EE | Mohammad Yavari,
Omid Shoaei,
Francesco Svelto:
Hybrid cascode compensation for two-stage CMOS operational amplifiers.
ISCAS (2) 2005: 1565-1568 |
| 32 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A low-power /spl Delta//spl Sigma/ modulator with low capacitor spread for multi-standard receiver applications.
ISCAS (4) 2005: 3107-3110 |
| 31 | EE | Yarallah Koolivand,
Omid Shoaei,
Ali Zahabi,
Hossein Shamsi,
Parviz Jabedar-Maralani:
A new technique for design CMOS LNA for multi-standard receivers.
ISCAS (4) 2005: 3231-3234 |
| 30 | EE | Nima Maghari,
Omid Shoaei:
A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support.
ISCAS (5) 2005: 4265-4268 |
| 29 | EE | Reza Lotfi,
Mohammad Taherzadeh-Sani,
Omid Shoaei:
Power consumption issues in high-speed high-resolution pipelined A/D converters.
ISCAS (5) 2005: 4618-4621 |
| 28 | EE | Mohammad Yavari,
Omid Shoaei:
High-order single-loop double-sampling sigma-delta modulator topologies for broadband applications.
ISCAS (6) 2005: 5593-5596 |
| 27 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand:
Design of a Band-Pass Pseudo-2-Path Switched Capacitor Ladder Filter.
ISQED 2005: 662-667 |
| 26 | EE | Yarallah Koolivand,
Omid Shoaei,
Ali Zahabi,
Parviz Jabedar-Maralani:
A complete analysis of noise in inductively source degenerated CMOS LNA's.
IEICE Electronic Express 2(1): 25-31 (2005) |
| 25 | EE | Ali Zahabi,
Omid Shoaei,
Yarallah Koolivand,
Parviz Jabedar-Maralani:
A 2/5mW CMOS Delta Sigma modulator employed in an improved GSM/UMTS receiver structure.
IEICE Electronic Express 2(8): 267-273 (2005) |
| 24 | EE | Hossein Shamsi,
Omid Shoaei,
Roghayeh Doost:
A New Method for Elimination of the Clock Jitter Effects in Continuous Time Delta-Sigma Modulators.
IEICE Transactions 88-A(10): 2570-2578 (2005) |
| 23 | EE | Hossein Shamsi,
Omid Shoaei:
A Simplified Illustration of Arbitrary DAC Waveform Effects in Continuous Time Delta-Sigma Modulators.
IEICE Transactions 88-A(12): 3577-3579 (2005) |
| 2004 |
|---|
| 22 | EE | Mohammad Taherzadeh-Sani,
Reza Lotfi,
Omid Shoaei:
Systematic Design for Optimization of High-Resolution Pipelined ADCs.
DATE 2004: 678-679 |
| 21 | EE | Mohammad Yavari,
Omid Shoaei:
Low-voltage sigma-delta modulator topologies for broadband applications.
ISCAS (1) 2004: 465-468 |
| 20 | EE | Nima Maghari,
Mohammad Yavari,
Omid Shoaei:
An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers.
ISCAS (1) 2004: 553-556 |
| 19 | | Reza Lotfi,
Mohammad Taherzadeh-Sani,
Omid Shoaei:
A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter].
ISCAS (1) 2004: 69-72 |
| 18 | | Babak Nejati,
Omid Shoaei:
A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter.
ISCAS (1) 2004: 73-76 |
| 17 | EE | Mohammad Taherzadeh-Sani,
Reza Lotfi,
Omid Shoaei:
A pseudo-class-AB telescopic-cascode operational amplifier.
ISCAS (1) 2004: 737-740 |
| 16 | EE | Mohammad Yavari,
Omid Shoaei:
A novel fully-differential class AB folded-cascode OTA.
IEICE Electronic Express 1(13): 358-362 (2004) |
| 15 | EE | Hossein Shamsi,
Omid Shoaei:
Return to-zero feedback insertion in a continuous time Delta-Sigma modulator for excess loop delay compensation.
IEICE Electronic Express 1(18): 568-574 (2004) |
| 14 | EE | Babak Nejati,
Omid Shoaei:
Systematic design of the pipelined analog-to-digital converter with radix<2.
Microelectronics Journal 35(9): 767-776 (2004) |
| 2003 |
|---|
| 13 | EE | Mohammad Taherzadeh-Sani,
Reza Lotfi,
Omid Shoaei:
A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs.
ICCAD 2003: 367-370 |
| 12 | EE | Reza Lotfi,
Mohammad Taherzadeh-Sani,
M. Yaser Azizi,
Omid Shoaei:
Systematic Design for Power Minimization of Pipelined Analog-to-Digital Converters.
ICCAD 2003: 371-374 |
| 11 | EE | Mohammad Yavari,
Omid Shoaei,
Ali Afzali-Kusha:
A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25µm CMOS.
ISCAS (1) 2003: 1045-1048 |
| 10 | EE | Reza Lotfi,
Mohammad Taherzadeh-Sani,
M. Yaser Azizi,
Omid Shoaei:
A low-power design methodology for high-resolution pipelined analog-to-digital converters.
ISLPED 2003: 334-339 |
| 9 | EE | Mohammad Yavari,
Omid Shoaei:
Low-voltage low-power fast-settling CMOS operational transconductance amplifiers for switched-capacitor applications.
ISLPED 2003: 345-348 |
| 8 | EE | Reza Lotfi,
Mohammad Taherzadeh-Sani,
M. Yaser Azizi,
Omid Shoaei:
Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications.
Integration 36(4): 175-189 (2003) |
| 2002 |
|---|
| 7 | EE | Hossein Shamsi,
Omid Shoaei,
Mohammad Yavari,
M. Yaser Azizi:
A six-order wideband bandpass sigma-delta modulator.
APCCAS (2) 2002: 101-107 |
| 6 | EE | J. Talebzadeh,
M. R. Hasanzadeh,
Mohammad Yavari,
Omid Shoaei:
A 10-bit 150-MS/s, parallel pipeline A/D converter in 0.6-µm CMOS.
ISCAS (3) 2002: 133-136 |
| 2001 |
|---|
| 5 | EE | P. Amini,
Omid Shoaei:
A low-power gigabit Ethernet analog equalizer.
ISCAS (1) 2001: 176-179 |
| 4 | EE | Babak Nejati,
Omid Shoaei:
A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOS.
ISCAS (1) 2001: 576-579 |
| 3 | EE | H. Zarei,
Omid Shoaei,
Seid Mehdi Fakhraie:
A low-power fully integrated Gaussian-MSK modulator based on the sigma-delta fractional-N frequency synthesis.
ISCAS (4) 2001: 100-103 |
| 1995 |
|---|
| 2 | | Omid Shoaei,
W. Martin Snelgrove:
A Multi-Feedback Design for LC Bandpass Delta-Sigma Modulators.
ISCAS 1995: 171-174 |
| 1994 |
|---|
| 1 | | Omid Shoaei,
W. Martin Snelgrove:
Optimal (Bandpass) Continuous-Time Sigma-Delta Modulator.
ISCAS 1994: 489-492 |
