2009 | ||
---|---|---|
52 | EE | Cristiana Bolchini, Yong-Bin Kim: Guest Editorial. J. Electronic Testing 25(1): 9-10 (2009) |
2008 | ||
51 | Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor: 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA IEEE Computer Society 2008 | |
50 | EE | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi: A low leakage 9t sram cell for ultra-low power operation. ACM Great Lakes Symposium on VLSI 2008: 123-126 |
49 | EE | Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi: Checkpointing of Rectilinear Growth in DNA Self-Assembly. DFT 2008: 525-533 |
48 | EE | Jun Zhao, Yong-Bin Kim: A low power 32 nanometer CMOS digitally controlled oscillator. SoCC 2008: 183-186 |
47 | EE | Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi: Low power 8T SRAM using 32nm independent gate FinFET technology. SoCC 2008: 247-250 |
46 | EE | Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi: Analysis and Simulation of Jitter Sequences for Testing Serial Data Channels. IEEE Trans. Industrial Informatics 4(2): 134-143 (2008) |
45 | EE | Byunghyun Jang, Yong-Bin Kim, Fabrizio Lombardi: Monomer Control for Error Tolerance in DNA Self-Assembly. J. Electronic Testing 24(1-3): 271-284 (2008) |
2007 | ||
44 | Cristiana Bolchini, Yong-Bin Kim, Adelio Salsano, Nur A. Touba: 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy. IEEE Computer Society 2007 | |
43 | EE | Young Bok Kim, Yong-Bin Kim: Fault Tolerant Source Routing for Network-on-Chip. DFT 2007: 12-20 |
42 | EE | Ravi Bonam, Yong-Bin Kim, Minsu Choi: Defect-Tolerant Gate Macro Mapping & Placement in Clock-Free Nanowire Crossbar Architecture. DFT 2007: 161-169 |
41 | EE | Yong-Bin Kim, Kyung Ki Kim, James T. Doyle: A CMOS Low Power Fully Digital Adaptive Power Delivery System Based on Finite State Machine Control. ISCAS 2007: 1149-1152 |
40 | EE | Kyung Ki Kim, Yong-Bin Kim: Optimal Body Biasing for Minimum Leakage Power in Standby Mode. ISCAS 2007: 1161-1164 |
39 | EE | Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park: Leakage Minimization Technique for Nanoscale CMOS VLSI. IEEE Design & Test of Computers 24(4): 322-330 (2007) |
38 | EE | Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin Kim, Joseph Ayers: Low power CMOS electronic central pattern generator design for a biomimetic underwater robot. Neurocomputing 71(1-3): 284-296 (2007) |
37 | EE | Leonid Zamdborg, Richard D. LeDuc, Kevin J. Glowacz, Yong-Bin Kim, Vinayak Viswanathan, Ian T. Spaulding, Bryan P. Early, Eric J. Bluhm, Shannee Babai, Neil L. Kelleher: ProSight PTM 2.0: improved protein identification and characterization for top down mass spectrometry. Nucleic Acids Research 35(Web-Server-Issue): 701-706 (2007) |
2006 | ||
36 | EE | Rui Tang, Yong-Bin Kim: PWAM signalling scheme for high speed serial link transceiver design. ACM Great Lakes Symposium on VLSI 2006: 49-52 |
35 | EE | Fengming Zhang, Warren Necoechea, Peter Reiter, Yong-Bin Kim, Fabrizio Lombardi: Load Board Designs Using Compound Dot Technique and Phase Detector for Hierarchical ATE Calibrations. DFT 2006: 486-494 |
34 | EE | Byunghyun Jang, Yong-Bin Kim, Fabrizio Lombardi: Error Tolerance of DNA Self-Assembly by Monomer Concentration Control. DFT 2006: 89-97 |
33 | EE | Yadunandana Yellambalase, Minsu Choi, Yong-Bin Kim: Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects. DFT 2006: 98-106 |
32 | EE | Woon Kang, Yong-Bin Kim, T. Doyle: A high-efficiency fully digital synchronous buck converter power delivery system based on a finite-state machine. IEEE Trans. VLSI Syst. 14(3): 229-240 (2006) |
31 | EE | Jihyun Lee, Yong-Bin Kim: ASLIC: A low power CMOS analog circuit design automation. Integration 39(3): 157-181 (2006) |
30 | EE | Rui Tang, Fengming Zhang, Yong-Bin Kim: Design metal-dot based QCA circuits using SPICE model. Microelectronics Journal 37(8): 821-827 (2006) |
2005 | ||
29 | EE | Rui Tang, Fengming Zhang, Yong-Bin Kim: Quantum-dot cellular automata SPICE macro model. ACM Great Lakes Symposium on VLSI 2005: 108-111 |
28 | EE | Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi: On the Modeling and Analysis of Jitter in ATE Using Matlab. DFT 2005: 285-293 |
27 | EE | Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi: Data Dependent Jitter (DDJ) Characterization Methodology. DFT 2005: 294-304 |
26 | EE | Rui Tang, Fengming Zhang, Yong-Bin Kim: QCA-based nano circuits design [adder design example]. ISCAS (3) 2005: 2527-2530 |
25 | EE | Jihyun Lee, Yong-Bin Kim: ASLIC: A Low Power CMOS Analog Circuit Design Automation. ISQED 2005: 470-475 |
24 | EE | Fengming Zhang, Rui Tang, Yong-Bin Kim: SET-based nano-circuit simulation and design method using HSPICE. Microelectronics Journal 36(8): 741-748 (2005) |
2004 | ||
23 | EE | Fengming Zhang, Rui Tang, Yong-Bin Kim: SET-based nano-circuit simulation and design method using HSPICE. ACM Great Lakes Symposium on VLSI 2004: 344-347 |
22 | EE | T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi: Fault tolerant clockless wave pipeline design. Conf. Computing Frontiers 2004: 350-356 |
21 | EE | Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi: Scan Test of IP Cores in an ATE Environment. DELTA 2004: 281-286 |
20 | EE | T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer: Reliability Modeling and Assurance of Clockless Wave Pipeline. DFT 2004: 442-450 |
19 | Young-Jun Lee, Yong-Bin Kim: A fast and precise interconnect capacitive coupling noise model. ISCAS (2) 2004: 873-876 | |
18 | Young-Jun Lee, Jihyun Lee, Yong-Bin Kim, Joseph Ayers, A. Volkovskii, Allen I. Selverston, Henry D. I. Abarbanel, Mikhail I. Rabinovich: Low power real time electronic neuron VLSI design using subthreshold technique. ISCAS (4) 2004: 744-747 | |
17 | EE | Minsu Choi, Nohpill Park, Vincenzo Piuri, Yong-Bin Kim, Fabrizio Lombardi: Balanced dual-stage repair for dependable embedded memory cores. Journal of Systems Architecture 50(5): 281-285 (2004) |
16 | EE | James T. Doyle, Young-Jun Lee, Yong-Bin Kim: Fast and accurate DAC modeling techniques based on wavelet theory. Microelectronics Journal 35(5): 451-460 (2004) |
15 | Richard D. LeDuc, Gregory K. Taylor, Yong-Bin Kim, Thomas E. Januszyk, Lee H. Bynum, Joseph V. Sola, John S. Garavelli, Neil L. Kelleher: ProSight PTM: an integrated environment for protein identification and characterization by top-down mass spectrometry. Nucleic Acids Research 32(Web-Server-Issue): 340-345 (2004) | |
2003 | ||
14 | EE | Yeshwant Kolla, Yong-Bin Kim, John Carter: A novel 32-bit scalable multiplier architecture. ACM Great Lakes Symposium on VLSI 2003: 241-244 |
13 | EE | Fengming Zhang, Young-Jun Lee, T. Kane, Luca Schiano, Mariam Momenzadeh, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi, S. Max, Phil Perkinson: A Digital and Wide Power Bandwidth H-Field Generator for Automatic Test Equipment. DFT 2003: 159-166 |
12 | EE | T. Feng, Nohpill Park, Yong-Bin Kim, Vincenzo Piuri: Yield Modeling and Analysis of a Clockless Asynchronous Wave Pipeline with Pulse Faults. DFT 2003: 34- |
11 | EE | Young-Jun Lee, Jong-Jin Lim, Yong-Bin Kim: A Novel Clocking Strategy for Dynamic Circuits. ISQED 2003: 307-312 |
10 | EE | Minsu Choi, Hardy J. Pottinger, Nohpill Park, Yong-Bin Kim: Need For Undergraduate And Graduate-Level Education In Testing Of Microelectronic Circuits And Systems. MSE 2003: 121-122 |
9 | EE | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri: Optimal Spare Utilization in Repairable and Reliable Memory Cores. MTDT 2003: 64-71 |
8 | EE | Minsu Choi, Noh-Jin Park, K. M. George, Byoungjae Jin, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi: Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems. NCA 2003: 341- |
7 | EE | Soha Hassoun, Yong-Bin Kim, Fabrizio Lombardi: Guest Editors' Introduction: Clockless VLSI Systems. IEEE Design & Test of Computers 20(6): 5-8 (2003) |
6 | EE | Woo Jin Kim, Yong-Bin Kim: Automating Wave-Pipelined Circuit Design. IEEE Design & Test of Computers 20(6): 51-58 (2003) |
2002 | ||
5 | EE | Hamidreza Hashempour, Yong-Bin Kim, Nohpill Park: A Test-Vector Generation Methodology for Crosstalk Noise Faults. DFT 2002: 40-50 |
4 | EE | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri: Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems. DFT 2002: 419-427 |
3 | EE | Dae Woon Kang, Yong-Bin Kim: Design flow of robust routed power distribution for low power ASIC. ISCAS (1) 2002: 181-184 |
2 | EE | Minsu Choi, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi: Hardware/Software Co-Reliability of Configurable Digital Systems. PRDC 2002: 67-74 |
2001 | ||
1 | EE | Chris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris J. Myers, Christian Schlegel: Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS. ARVLSI 2001: 132-147 |