Guy Bois

2009
28	EE	Patrick Mahoney, Yvon Savaria, Guy Bois, Patrice Plante: Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. T. HiPEAC 2: 307-325 (2009)
2008
27	EE	Sebastien Fontaine, Sylvain Goyette, J. M. Pierre Langlois, Guy Bois: Acceleration of a 3D target tracking algorithm using an application specific instruction set processor. ICCD 2008: 255-259
2007
26	EE	L. Moss, Maxime de Nanclas, Luc Filion, Sebastien Fontaine, Guy Bois, M. Aboulhamid: Seamless hardware/software performance co-monitoring in a codesign simulation environment with RTOS support. DATE 2007: 876-881
25	EE	Mohamed H. Zaki, Ghiath Al Sammane, Sofiène Tahar, Guy Bois: Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs. FMCAD 2007: 207-215
24		Mohamed H. Zaki, Sofiène Tahar, Guy Bois: Qualitative Abstraction based Verification for Analog Circuits. ISoLA 2007: 147-158
2006
23	EE	Mohamed H. Zaki, Sofiène Tahar, Guy Bois: A practical approach for monitoring analog circuits. ACM Great Lakes Symposium on VLSI 2006: 330-335
22	EE	Alena Tsikhanovich, Frédéric Rousseau, El Mostapha Aboulhamid, Guy Bois: Transaction Level Modeling in Hardware/Software System Design using .Net Framework. CCECE 2006: 140-143
21	EE	Jérôme Chevalier, Maxime de Nanclas, Luc Filion, Olivier Benny, Mathieu Rondonneau, Guy Bois, El Mostapha Aboulhamid: A SystemC Refinement Methodology for Embedded Software. IEEE Design & Test of Computers 23(2): 148-158 (2006)
2005
20	EE	Alena Tsikhanovich, El Mostapha Aboulhamid, Guy Bois: A Methodology for Hw/Sw Specification and Simulation at Multiple Levels of Abstraction. IWSOC 2005: 24-29
19	EE	Jean-Francois Thibeault, Mortimer Hubin, Francois Deslauriers, Patrick Samson, Guy Bois: A Reprogrammable SoC Design for a Real-Time Control Application. MSE 2005: 73-74
2004
18	EE	D. Quinn, Bruno Lavigueur, Guy Bois, El Mostapha Aboulhamid: A System Level Exploration Platform and Methodology for Network Applications Based on Configurable Processors. DATE 2004: 364-371
17	EE	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: .NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation. DATE 2004: 732-733
16	EE	Luc Charest, El Mostapha Aboulhamid, Guy Bois: Using Design Patterns for Type Unification and Introspection in SystemC. IWSOC 2004: 45-50
15	EE	S. Regimbal, Yvon Savaria, Guy Bois: Verification Strategy Determination Using Dependence Analysis of Transaction-Level Models. IWSOC 2004: 87-92
14	EE	James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois: ESys.Net: a new solution for embedded systems modeling and simulation. LCTES 2004: 107-114
2003
13	EE	Marc Bertola, Guy Bois: A methodology for the design of AHB bus master wrappers. DSD 2003: 90-97
12	EE	Jérôme Chevalier, Mathieu Rondonneau, Olivier Benny, Guy Bois, El Mostapha Aboulhamid, François R. Boyer: SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS. FDL 2003: 704-716
11	EE	S. Regimbal, Jean-Francois Lemire, Yvon Savaria, Guy Bois, El Mostapha Aboulhamid, A. Baron: Automating Functional Coverage Analysis Based on an Executable Specification. IWSOC 2003: 228-234
10	EE	Marc Bertola, Guy Bois: Teaching Bus Architectures with a Basic, Hands-On SOC Platform. MSE 2003: 68-
2001
9	EE	Luc Charest, Michel Reid, El Mostapha Aboulhamid, Guy Bois: A methodology for interfacing open source systemC with a third party software. DATE 2001: 16
8	EE	Mohamed Nekili, Yvon Savaria, Guy Bois: Minimizing process-induced skew using delay tuning. ISCAS (4) 2001: 426-429
1999
7	EE	B. Le Chapelain, A. Mechain, Yvon Savaria, Guy Bois: Development of a high performance TSPC library for implementation of large digital building blocks. ISCAS (1) 1999: 443-446
6	EE	B. Bosi, Guy Bois, Yvon Savaria: Reconfigurable pipelined 2-D convolvers for fast digital signal processing. IEEE Trans. VLSI Syst. 7(3): 299-308 (1999)
1998
5	EE	Manoucher Shaditalab, Guy Bois, Mohamad Sawan: Self Sorting Radix_2 FFT on FPGA using Parallel Pipelined Distributed Arithmetic Blocks. FCCM 1998: 337-338
4	EE	Mohamed Nekili, Yvon Savaria, Guy Bois: Design of Clock Distribution Networks in Presence of Process Variations. Great Lakes Symposium on VLSI 1998: 95-102
1997
3	EE	Mohamed Nekili, Guy Bois, Yvon Savaria: Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Trans. VLSI Syst. 5(2): 161-174 (1997)
1996
2	EE	Guy Bois, Eduard Cerny: Efficient generation of diagonal constraints for 2-D mask compaction. IEEE Trans. on CAD of Integrated Circuits and Systems 15(9): 1119-1126 (1996)
1994
1		Mohamed Nekili, Yvon Savaria, Guy Bois: A Fast Low-Power Driver for Long Interconnections in VLSI Systems. ISCAS 1994: 343-346

Coauthor Index

1	El Mostapha Aboulhamid	[9] [11] [12] [14] [16] [17] [18] [20] [21] [22]
2	M. Aboulhamid	[26]
3	A. Baron	[11]
4	Olivier Benny	[12] [21]
5	Marc Bertola	[10] [13]
6	B. Bosi	[6]
7	François R. Boyer	[12] [14] [17]
8	Eduard Cerny	[2]
9	B. Le Chapelain	[7]
10	Luc Charest	[9] [14] [16] [17]
11	Jérôme Chevalier	[12] [21]
12	J. P. David	[14] [17]
13	Francois Deslauriers	[19]
14	Luc Filion	[21] [26]
15	Sebastien Fontaine	[26] [27]
16	Sylvain Goyette	[27]
17	Mortimer Hubin	[19]
18	J. M. Pierre Langlois	[27]
19	James Lapalme	[14] [17]
20	Bruno Lavigueur	[18]
21	Jean-Francois Lemire	[11]
22	Patrick Mahoney	[28]
23	A. Mechain	[7]
24	L. Moss	[26]
25	Maxime de Nanclas	[21] [26]
26	Mohamed Nekili	[1] [3] [4] [8]
27	Gabriela Nicolescu	[14] [17]
28	Patrice Plante	[28]
29	D. Quinn	[18]
30	S. Regimbal	[11] [15]
31	Michel Reid	[9]
32	Mathieu Rondonneau	[12] [21]
33	Frédéric Rousseau	[22]
34	Ghiath Al Sammane	[25]
35	Patrick Samson	[19]
36	Yvon Savaria	[1] [3] [4] [6] [7] [8] [11] [15] [28]
37	Mohamad Sawan	[5]
38	Manoucher Shaditalab	[5]
39	Sofiène Tahar	[23] [24] [25]
40	Jean-Francois Thibeault	[19]
41	Alena Tsikhanovich	[20] [22]
42	Mohamed H. Zaki	[23] [24] [25]

Colors in the list of coauthors