Charles A. Zukowski

2006
21	EE	Ali Bastani, Charles A. Zukowski: Monotonic static CMOS tradeoffs in sub-100nm technologies. ACM Great Lakes Symposium on VLSI 2006: 278-283
20	EE	Ali Bastani, Charles A. Zukowski: A Low-Leakage High-Speed Monotonic Static CMOS 64b Adder in a Dual Gate Oxide 65-nm CMOS Technology. ISQED 2006: 312-317
2005
19	EE	Ali Bastani, Charles A. Zukowski: Characterization of monotonic static CMOS gates in a 65nm technology. ACM Great Lakes Symposium on VLSI 2005: 408-411
18	EE	Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky: Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies. Integration 38(3): 491-504 (2005)
2004
17		David Garrett, John Lach, Charles A. Zukowski: Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004 ACM 2004
16	EE	Ali Bastani, Charles A. Zukowski: Design of superbuffers in sub-100nm CMOS technologies with significant gate leakage. ACM Great Lakes Symposium on VLSI 2004: 119-122
15	EE	Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky: Characterization of logic circuit techniques for high leakage CMOS technologies. ACM Great Lakes Symposium on VLSI 2004: 230-235
2003
14	EE	Ilias Tagkopoulos, Charles A. Zukowski, German Cavelier, Dimitris Anastassiou: A custom FPGA for the simulation of gene regulatory networks. ACM Great Lakes Symposium on VLSI 2003: 132-135
2000
13	EE	Gary L. Dare, Charles A. Zukowski: Accuracy management for mixed-mode digital VLSI simulation. ACM Great Lakes Symposium on VLSI 2000: 167-170
1996
12	EE	Christophe Tretz, Charles A. Zukowski: CMOS Transistor Sizing for Minimization of Energy-Delay Product. Great Lakes Symposium on VLSI 1996: 168-173
11		Hong Shi, Charles A. Zukowski, Omar Wing: VLSI Design Optimization of Input/Output-Buffered Broadband ATM Switches. INFOCOM 1996: 810-817
1995
10	EE	Hong Shi, Naeem Abbasi, Charles A. Zukowski, Omar Wing: Buffer size trade-offs in input/output buffered ATM switches under various conditions. ICCCN 1995: 258
1994
9		Paul Landsberg, Charles A. Zukowski: Generic Queue Scheduling: Concepts and VLSI. INFOCOM 1994: 1438-1445
1993
8		Perng-Shyong Lin, Charles A. Zukowski: Analysis and Control of Timing Jitter in Digital Logic Arising from Noise Voltage Sources. ICCD 1993: 352-356
7		Perng-Shyong Lin, Charles A. Zukowski: Jitter Due to Signal History in Digital Logic Circuits and Its Control Strategies. ISCAS 1993: 2114-2117
1992
6		Charles A. Zukowski, Ying-Wen Bai: Implementing a High-Frequency Pattern Generator Based on Combinational Merging. ICCD 1992: 81-84
1991
5		Tong-Bi Pei, Charles A. Zukowski: VLSI Implementation of Routing Tables: Tries and CAMs. INFOCOM 1991: 515-524
1990
4		Charles A. Zukowski, George Gristede, Albert E. Ruehli: Measuring Error Propagation in Waveform Relaxation Algorithms. ICCAD 1990: 170-173
1988
3		Lance A. Glasser, Charles A. Zukowski: Continuous Models for Communication Density Constraints on Multiprocessor Performance. IEEE Trans. Computers 37(6): 652-656 (1988)
1986
2	EE	Charles A. Zukowski: Relaxing Bounds for Linear RC Mesh Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 5(2): 305-312 (1986)
1985
1		Jeffrey H. Lang, Charles A. Zukowski, Richard O. LaMaire, Chae H. An: Integrated-Circuit Logarithmic Arithmetic Units. IEEE Trans. Computers 34(5): 475-483 (1985)

Coauthor Index

1	Naeem Abbasi	[10]
2	Chae H. An	[1]
3	Dimitris Anastassiou	[14]
4	Ying-Wen Bai	[6]
5	Ali Bastani	[16] [19] [20] [21]
6	German Cavelier	[14]
7	Phillip Chin	[15] [18]
8	Gary L. Dare	[13]
9	David Garrett	[17]
10	Lance A. Glasser	[3]
11	George Gristede	[4] [15] [18]
12	Stephen V. Kosonocky	[15] [18]
13	Richard O. LaMaire	[1]
14	John Lach	[17]
15	Paul Landsberg	[9]
16	Jeffrey H. Lang	[1]
17	Perng-Shyong Lin	[7] [8]
18	Tong-Bi Pei	[5]
19	Albert E. Ruehli	[4]
20	Hong Shi	[10] [11]
21	Ilias Tagkopoulos	[14]
22	Christophe Tretz	[12]
23	Omar Wing	[10] [11]

Colors in the list of coauthors