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Xiangyuan Liu

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2007
2EEShuming Chen, Xiangyuan Liu: A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs. NOCS 2007: 75-82
2006
1EEXiangyuan Liu, Shuming Chen: Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning. ACM Great Lakes Symposium on VLSI 2006: 91-94

Coauthor Index

1Shuming Chen [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)