| |
| 2008 | ||
|---|---|---|
| 5 | EE | Heon-Mo Koo, Prabhat Mishra: Specification-based compaction of directed tests for functional validation of pipelined processors. CODES+ISSS 2008: 137-142 |
| 2006 | ||
| 4 | EE | Heon-Mo Koo, Prabhat Mishra: Test generation using SAT-based bounded model checking for validation of pipelined processors. ACM Great Lakes Symposium on VLSI 2006: 362-365 |
| 3 | EE | Heon-Mo Koo, Prabhat Mishra: Functional test generation using property decompositions for validation of pipelined processors. DATE 2006: 1240-1245 |
| 2 | EE | Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy S. Abadir: Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. MTV 2006: 33-36 |
| 2005 | ||
| 1 | EE | Prabhat Mishra, Heon-Mo Koo, Zhuo Huang: Language-driven Validation of Pipelined Processors using Satisfiability Solvers. MTV 2005: 119-126 |
| 1 | Magdy S. Abadir | [2] |
| 2 | Jayanta Bhadra | [2] |
| 3 | Zhuo Huang | [1] |
| 4 | Prabhat Mishra | [1] [2] [3] [4] [5] |