IEEE Design & Test of Computers, Volume 24

Volume 24, Number 1, January/February 2007

• Tim Cheng:
  Moore's law meets the life sciences. 4
  Electronic Edition (link) BibTeX
• Aart J. de Geus:
  A. Richard Newton: Technologist with a Mission. 6-7
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• Krishnendu Chakrabarty, Roland Thewes:
  Guest Editors' Introduction: Biochips and Integrated Biosensor Platforms. 8-9
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• Richard B. Fair, Andrey Khlystov, Tina D. Tailor, Vladislav Ivanov, Randall D. Evans, Vijay Srinivasan, Vamsee K. Pamula, Michael G. Pollack, Peter B. Griffin, Jack Zhou:
  Chemical and Biological Applications of Digital-Microfluidic Devices. 10-24
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• Gianni Medoro, Roberto Guerrieri, Nicolò Manaresi, Claudio Nastruzzi, Roberto Gambari:
  Lab on a Chip for Live-Cell Manipulation. 26-36
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• Luca Benini, Carlotta Guiducci, Christian Paulus:
  Electronic Detection of DNA Hybridization: Toward CMOS Microarrays. 38-48
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• S. Krishnamoorthy, J. J. Feng, Z. J. Chen:
  Simulation-Based Analysis of Dielectrophoretic Field Flow Fractionation Devices. 50-58
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• Fei Su, Jun Zeng:
  Computer-Aided Design and Test for Digital Microfluidics. 60-70
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• Hans G. Kerkhoff:
  Testing Microelectronic Biofluidic Systems. 72-82
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• Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias:
  Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. 83-93
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• Carol Stolicny:
  ITC 2006 panels. 94-96
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• Bruce C. Kim:
  TTTC Newsletter. 97
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• Victor Berman:
  Conflicting International Standards Pressure Chip Designers. 98-99
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• Reinaldo A. Bergamaschi:
  Embedded Systems Week. 102-103
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• Joe Damore:
  DATC Newsletter. 103
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• Scott Davidson:
  A laboratory right under your nose. 104
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Volume 24, Number 2, March/April 2007

• Tim Cheng:
  Cocktail approach to functional verification. 108
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• Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang:
  Guest Editors' Introduction: Attacking Functional Verification through Hybrid Techniques. 110-111
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• Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang, Sandip Ray:
  A Survey of Hybrid Techniques for Functional Verification. 112-122
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• Praveen Tiwari, Raj S. Mitra:
  Hybrid Verification of Protocol Bridges. 124-131
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• Sandip Ray, Rob Sumners:
  Combining Theorem Proving with Model Checking through Predicate Abstraction. 132-139
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• Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Andrea Fedeli:
  Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. 140-152
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• Chin-Lung Chuang, Wei-Hsiang Cheng, Dong-Jung Lu, Chien-Nan Jimmy Liu:
  Hybrid Approach to Faster Functional Verification with Full Visibility. 154-162
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• Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu:
  Economic Aspects of Memory Built-in Self-Repair. 164-172
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• Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf:
  Roundtable: Envisioning the Future for Multiprocessor SoC. 174-183
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• FSA SiP Market and Patent Analysis Report. 184-192
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• Priyadarsan Patra:
  On the cusp of a validation wall. 193-196
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• Bruce C. Kim:
  Test Technology TC Newsletter. 197
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• Scott Davidson:
  A textbook with two target audiences. 198-199
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• C. P. Ravikumar, Jari Nurmi:
  Conference Reports. 202-203
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• Joe Damore:
  DATC Newsletter. 207
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• Scott Davidson:
  Losing control. 208
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Volume 24, Number 3, May/June 2007

• Tim Cheng:
  Supporting cost-effective innovation. 212
  Electronic Edition (link) BibTeX
• Mohammad Tehranipoor, Kenneth M. Butler:
  Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs. 214-215
  Electronic Edition (link) BibTeX
• Zahi S. Abuhamdeh, Bob Hannagan, Jeff Remmers, Alfred L. Crouch:
  A Production IR-Drop Screen on a Chip. 216-224
  Electronic Edition (link) BibTeX
• Jing Wang, Duncan M. Hank Walker, Xiang Lu, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul J. A. M. van de Wiel, Stefan Eichenberger:
  Modeling Power Supply Noise in Delay Testing. 226-234
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• Karim Arabi, Resve A. Saleh, Xiongfei Meng:
  Power Supply Noise in SoCs: Metrics, Management, and Measurement. 236-244
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• Sanjay Pant, Eli Chiprout, David Blaauw:
  Power Grid Physics and Implications for CAD. 246-254
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• Praveen Ghanta, Sarma B. K. Vrudhula:
  Analysis of Power Supply Noise in the Presence of Process Variations. 256-266
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• Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski:
  Scan-Based Tests with Low Switching Activity. 268-275
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• Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker:
  Power Droop Testing. 276-284
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• Grant Martin:
  Everything but the kitchen sink. 286-287
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• Joe Damore:
  DATC Newsletter. 291
  Electronic Edition (link) BibTeX
• Bruce C. Kim:
  TTTC Newsletter. 292
  Electronic Edition (link) BibTeX
• T. M. Mak:
  The case for power with test. 296
  Electronic Edition (link) BibTeX

Volume 24, Number 4, July/August 2007

• Tim Cheng:
  Design and CAD for Nanotechnologies. 300
  Electronic Edition (link) BibTeX
• Fabrizio Lombardi, Cecilia Metra:
  Guest Editors' Introduction: The State of the Art in Nanoscale CAD. 302-303
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• Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi:
  An Overview of Nanoscale Devices and Circuits. 304-311
  Electronic Edition (link) BibTeX
• Smita Krishnaswamy, Igor L. Markov, John P. Hayes:
  Tracking Uncertainty with Probabilistic Logic Circuit Testing. 312-321
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• Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park:
  Leakage Minimization Technique for Nanoscale CMOS VLSI. 322-330
  Electronic Edition (link) BibTeX
• Salem Abdennadher, Saghir A. Shaikh:
  Practices in Mixed-Signal and RF IC Testing. 332-339
  Electronic Edition (link) BibTeX
• Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika F. Cota, Luigi Carro:
  Crosstalk- and SEU-Aware Networks on Chips. 340-350
  Electronic Edition (link) BibTeX
• Federico Di Palma, Giuseppe De Nicolao, Guido Miraglia, Oliver M. Donzelli:
  ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis. 352-361
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• Donghwi Lee, Erik H. Volkerink, Intaik Park, Jeff Rearick:
  Empirical Validation of Yield Recovery Using Idle-Cycle Insertion. 362-372
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• V. R. Devanathan, C. P. Ravikumar, V. Kamakoti:
  Variation-Tolerant, Power-Safe Pattern Generation. 374-384
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• Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu:
  Raisin: Redundancy Analysis Algorithm Simulation. 386-396
  Electronic Edition (link) BibTeX
• Sachin S. Sapatnekar:
  Book Review: An Assay of Biochips. 402-403
  Electronic Edition (link) BibTeX
• Joe Damore:
  DATC Newsletter. 404-405
  Electronic Edition (link) BibTeX
• Bruce C. Kim:
  TTTC Newsletter. 407
  Electronic Edition (link) BibTeX
• Scott Davidson:
  How do we train today's students to become tomorrow's engineers? 408
  Electronic Edition (link) BibTeX

Volume 24, Number 5, September/October 2007

• Tim Cheng:
  Combining synchronous and asynchronous timing schemes for high-performance systems. 412
  Electronic Edition (link) BibTeX
• Michael Kishinevsky, Sandeep K. Shukla, Ken S. Stevens:
  Guest Editors' Introduction: GALS Design and Validation. 414-416
  Electronic Edition (link) BibTeX
• Paul Teehan, Mark R. Greenstreet, Guy Lemieux:
  A Survey and Taxonomy of GALS Design Styles. 418-428
  Electronic Edition (link) BibTeX
• Milos Krstic, Eckhard Grass, Frank K. Gürkaynak, Pascal Vivet:
  Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook. 430-441
  Electronic Edition (link) BibTeX
• Mario R. Casu, Luca Macchiarulo:
  Adaptive Latency-Insensitive Protocols. 442-452
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• Luis A. Plana, Stephen B. Furber, Steve Temple, Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang:
  A GALS Infrastructure for a Massively Parallel Multiprocessor. 454-463
  Electronic Edition (link) BibTeX
• Tejpal Singh, Alexander Taubin:
  A Highly Scalable GALS Crossbar Using Token Ring Arbitration. 464-472
  Electronic Edition (link) BibTeX
• Anne Gattiker:
  Guest Editor's Introduction: Getting More Out of Test. 474-475
  Electronic Edition (link) BibTeX
• Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai:
  X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. 476-485
  Electronic Edition (link) BibTeX
• Mack W. Riley, Mike Genden:
  Cell Broadband Engine Debugging for Unknown Events. 486-493
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• Scott Davidson, Helen Davidson:
  The Psychology of Electronic Test. 494-501
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• Sachin S. Sapatnekar, Leon Stok:
  DAC Highlights. 502-504
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• Joe Damore:
  DATC Newsletter. 505
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• Scott Davidson:
  Book Reviews: Test Tutorials in Book Form. 506-507
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• Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici:
  DATE 07 workshop on diagnostic services in NoCs. 510
  Electronic Edition (link) BibTeX
• Bruce C. Kim:
  TTTC Newsletter. 511
  Electronic Edition (link) BibTeX
• Jill Sibert:
  ITC exhibits for fun and profit. 512
  Electronic Edition (link) BibTeX

Volume 24, Number 6, November/December 2007

• Tim Cheng:
  Trustworthy ICs for secure embedded computing. 516
  Electronic Edition (link) BibTeX
• Patrick Schaumont, Anand Raghunathan:
  Guest Editors' Introduction: Security and Trust in Embedded-Systems Design. 518-520
  Electronic Edition (link) BibTeX
• Thomas Eisenbarth, Sandeep Kumar, Christof Paar, Axel Poschmann, Leif Uhsadel:
  A Survey of Lightweight-Cryptography Implementations. 522-533
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• Kevin Schutz:
  OEM Component Authentication. 534
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• Thomas Popp, Stefan Mangard, Elisabeth Oswald:
  Power Analysis Attacks and Countermeasures. 535-543
  Electronic Edition (link) BibTeX
• Chong Hee Kim, Jean-Jacques Quisquater:
  Faults, Injection Methods, and Fault Attacks. 544-545
  Electronic Edition (link) BibTeX
• Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu:
  Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. 546-555
  Electronic Edition (link) BibTeX
• Hamad Alrimeih, Daler N. Rakhmatov:
  Security-Performance Trade-offs in Embedded Systems Using Flexible ECC Hardware. 556-569
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• G. Edward Suh, Charles W. O'Donnell, Srinivas Devadas:
  Aegis: A Single-Chip Secure Processor. 570-580
  Electronic Edition (link) BibTeX
• Steve Trimberger:
  Security in SRAM FPGAs. 581
  Electronic Edition (link) BibTeX
• Peter Wilson, Alexandre Frey, Tom Mihm, Danny Kershaw, Tiago Alves:
  Implementing Embedded Security on Dual-Virtual-CPU Systems. 582-591
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• Tom Mihm:
  Protecting Critical Data. 592
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• Victor Berman:
  DASC standards track IP-based design trends. 594-595
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• Grant Martin:
  Making a List...Checking it Twice. 596-597
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• Joe Damore:
  DATC Newsletter. 603
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• Bruce C. Kim:
  TTTC Newsletter. 605
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• Mel Breuer:
  Tesla and AND gates. 624
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