Mark Kassab

2008
13	EE	Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Neelanjan Mukherjee, Mark Kassab: X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 147-159 (2008)
2007
12	EE	Dhiraj Goswami, Kun-Han Tsai, Mark Kassab, Janusz Rajski: Test Generation in the Presence of Timing Exceptions and Constraints. DAC 2007: 688-693
11	EE	Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai: X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis. IEEE Design & Test of Computers 24(5): 476-485 (2007)
2004
10	EE	Brady Benware, Cam Lu, John Van Slyke, Prabhu Krishnamurthy, Robert Madge, Martin Keim, Mark Kassab, Janusz Rajski: Affordable and Effective Screening of Delay Defects in ASICs using the Inline Resistance Fault Model. ITC 2004: 1285-1294
9	EE	Xinli Gu, Cyndee Wang, Abby Lee, Bill Eklow, Kun-Han Tsai, Jan Arild Tofte, Mark Kassab, Janusz Rajski: Realizing High Test Quality Goals with Smart Test Resource Usage. ITC 2004: 525-533
8	EE	Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee: Embedded deterministic test. IEEE Trans. on CAD of Integrated Circuits and Systems 23(5): 776-792 (2004)
2003
7	EE	Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muhmenthaler, Nagesh Tamarapalli, Mark Kassab, Nilanjan Mukherjee, Janusz Rajski: Industrial Experience with Adoption of EDT for Low-Cost Test without Concessions. ITC 2003: 1211-1220
6	EE	Janusz Rajski, Mark Kassab, Nilanjan Mukherjee, Nagesh Tamarapalli, Jerzy Tyszer, Jun Qian: Embedded Deterministic Test for Low-Cost Manufacturing. IEEE Design & Test of Computers 20(5): 58-66 (2003)
2002
5	EE	Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, Rob Thompson, Kun-Han Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Eide, Jun Qian: Embedded Deterministic Test for Low-Cost Manufacturing Test. ITC 2002: 301-310
1999
4		Graham Hetherington, Tony Fryars, Nagesh Tamarapalli, Mark Kassab, Abu S. M. Hassan, Janusz Rajski: Logic BIST for large industrial designs: real issues and case studies. ITC 1999: 358-367
1998
3	EE	Aiman H. El-Maleh, Mark Kassab, Janusz Rajski: A Fast Sequential Learning Technique for Real Circuits with Application to Enhancing ATPG Performance. DAC 1998: 625-631
1995
2	EE	Mark Kassab, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer: Software Accelerated Functional Fault Simulation for Data-Path Architectures. DAC 1995: 333-338
1		Mark Kassab, Janusz Rajski, Jerzy Tyszer: Hierarchical Functional-Fault Simulation for High-Level Synthesis. ITC 1995: 596-605

Coauthor Index

1	Ralf Arnold	[7]
2	Matthias Beck	[7]
3	Brady Benware	[10]
4	Wu-Tung Cheng	[11] [13]
5	Geir Eide	[5]
6	Bill Eklow (William Eklow)	[9]
7	Aiman H. El-Maleh (Aiman El-Maleh)	[3]
8	Tony Fryars	[4]
9	Dhiraj Goswami	[12]
10	Xinli Gu	[9]
11	Abu S. M. Hassan	[4]
12	Andre Hertwig	[5]
13	Graham Hetherington	[4]
14	Martin Keim	[10]
15	Prabhu Krishnamurthy	[10]
16	Liyang Lai	[11]
17	Abby Lee	[9]
18	Cam Lu	[10]
19	Robert Madge	[10]
20	Grzegorz Mrugalski	[5] [11] [13]
21	Peter Muhmenthaler	[7]
22	Neelanjan Mukherjee	[13]
23	Nilanjan Mukherjee	[2] [5] [6] [7] [8] [11]
24	Frank Poehl	[7]
25	Jun Qian	[5] [6]
26	Janusz Rajski	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
27	Manish Sharma	[11]
28	John Van Slyke	[10]
29	Nagesh Tamarapalli	[4] [5] [6] [7]
30	Rob Thompson	[5]
31	Jan Arild Tofte	[9]
32	Kun-Han Tsai	[5] [9] [12]
33	Jerzy Tyszer	[1] [2] [5] [6] [8] [11] [13]
34	Cyndee Wang	[9]