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Thomas Popp

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2009
8EEThomas Popp, Mario Kirschbaum, Stefan Mangard: Practical Attacks on Masked Hardware. CT-RSA 2009: 211-225
2008
7EEStefan Tillich, Martin Feldhofer, Thomas Popp, Johann Großschädl: Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box. Signal Processing Systems 50(2): 251-261 (2008)
2007
6EEThomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard: Evaluation of the Masked Logic Style MDPL on a Prototype Chip. CHES 2007: 81-94
5EEThomas Popp, Stefan Mangard, Elisabeth Oswald: Power Analysis Attacks and Countermeasures. IEEE Design & Test of Computers 24(6): 535-543 (2007)
2006
4EEThomas Popp, Stefan Mangard: Implementation aspects of the DPA-resistant logic style MDPL. ISCAS 2006
3EEManfred Josef Aigner, Stefan Mangard, Francesco Menichelli, Renato Menicocci, Mauro Olivieri, Thomas Popp, Giuseppe Scotti, Alessandro Trifiletti: Side channel analysis resistant design flow. ISCAS 2006
2005
2EEThomas Popp, Stefan Mangard: Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints. CHES 2005: 172-186
1EEStefan Mangard, Thomas Popp, Berndt M. Gammel: Side-Channel Leakage of Masked CMOS Gates. CT-RSA 2005: 351-365

Coauthor Index

1Manfred Josef Aigner [3]
2Martin Feldhofer [7]
3Berndt M. Gammel [1]
4Johann Großschädl [7]
5Mario Kirschbaum [6] [8]
6Stefan Mangard [1] [2] [3] [4] [5] [6] [8]
7Francesco Menichelli [3]
8Renato Menicocci [3]
9Mauro Olivieri [3]
10Elisabeth Oswald [5]
11Giuseppe Scotti [3]
12Stefan Tillich [7]
13Alessandro Trifiletti [3]
14Thomas Zefferer [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)