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Jen-Chieh Yeh

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2007
16EEYu-Tsao Hsing, Chun-Chieh Huang, Jen-Chieh Yeh, Cheng-Wen Wu: SDRAM Delay Fault Modeling and Performance Testing. VTS 2007: 53-58
15EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: Raisin: Redundancy Analysis Algorithm Simulation. IEEE Design & Test of Computers 24(4): 386-396 (2007)
14EEJen-Chieh Yeh, Kuo-Liang Cheng, Yung-Fa Chou, Cheng-Wen Wu: Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1101-1113 (2007)
2006
13EEChen-Hsing Wang, Chih-Yen Lo, Min-Sheng Lee, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang: A network security processor design based on an integrated SOC design and test platform. DAC 2006: 490-495
12EEMu-Hsien Hsu, Yu-Tsao Hsing, Jen-Chieh Yeh, Cheng-Wen Wu: Fault-Pattern Oriented Defect Diagnosis for Flash Memory. MTDT 2006: 3-8
2005
11EEYu-Chun Dawn, Jen-Chieh Yeh, Cheng-Wen Wu, Chia-Ching Wang, Yung-Chen Lin, Chao-Hsun Chen: Flash Memory Die Sort by a Sample Classification Method. Asian Test Symposium 2005: 182-187
10EEJen-Chieh Yeh, Yan-Ting Lai, Yuan-Yuan Shih, Cheng-Wen Wu, Chien-Hung Ho, Yen-Tai Lin: Flash Memory Built-In Self-Diagnosis with Test Mode Control. VTS 2005: 15-20
9EEJin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu: A built-in self-repair design for RAMs with 2-D redundancy. IEEE Trans. VLSI Syst. 13(6): 742-745 (2005)
2004
8EEChih-Tsun Huang, Jen-Chieh Yeh, Yuan-Yuan Shih, Rei-Fu Huang, Cheng-Wen Wu: On Test and Diagnostics of Flash Memories. Asian Test Symposium 2004: 260-265
2003
7EEJin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow: A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy. ITC 2003: 393-402
2002
6EEJen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: Flash Memory Built-In Self-Test Using March-Like Algorithm. DELTA 2002: 137-141
5EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories. IOLTW 2002: 262-
4EESau-Kwo Chiu, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Diagonal Test and Diagnostic Schemes for Flash Memorie. ITC 2002: 37-46
3EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories. MTDT 2002: 68-
2EEKuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics. VTS 2002: 281-288
2001
1EEKuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip. Asian Test Symposium 2001: 91-96

Coauthor Index

1Chao-Hsun Chen [11]
2Kuo-Liang Cheng [1] [2] [6] [14]
3Sau-Kwo Chiu [4]
4Yung-Fa Chou [6] [14]
5Eugene Chow [7]
6Yu-Chun Dawn [11]
7Chien-Hung Ho [10]
8Yu-Tsao Hsing [12] [16]
9Archer Hsu [7]
10Mu-Hsien Hsu [12]
11Chia-Ming Hsueh [1]
12Chih-Tsun Huang [1] [2] [4] [6] [8] [13]
13Chun-Chieh Huang [16]
14Jing-Reng Huang [1]
15Rei-Fu Huang [3] [5] [7] [8] [9] [15]
16Shi-Yu Huang [13]
17Yan-Ting Lai [10]
18Min-Sheng Lee [13]
19Jin-Fu Li [3] [5] [7] [9] [15]
20Yen-Tai Lin [10]
21Yung-Chen Lin [11]
22Chih-Yen Lo [13]
23Yuan-Yuan Shih [8] [10]
24Peir-Yuan Tsai [7]
25Chen-Hsing Wang [13]
26Chia-Ching Wang [11]
27Chih-Wea Wang [2]
28Cheng-Wen Wu [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
29Chi-Feng Wu [6]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)