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Andrea Fedeli

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2007
14EEKa Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel P. Schellekens: SC2SCFL: Automated SystemC to SystemCFL Translation. SAMOS 2007: 34-45
13EENicola Bombieri, Franco Fummi, Graziano Pravadelli, Andrea Fedeli: Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. IEEE Design & Test of Computers 24(2): 140-152 (2007)
12EEAndrea Fedeli, Franco Fummi, Graziano Pravadelli: Properties Incompleteness Evaluation by Functional Verification. IEEE Trans. Computers 56(4): 528-544 (2007)
2005
11EENicola Bombieri, Andrea Fedeli, Franco Fummi: Extended abstract: on the property-based verification in SoC design flow founded on transaction level modeling. MEMOCODE 2005: 239-240
10EENicola Bombieri, Andrea Fedeli, Franco Fummi: On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling. MTV 2005: 127-132
2004
9EEMichele Borgatti, Andrea Fedeli, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Cristina Marconcini, Graziano Pravadelli: A Verification Methodology for Reconfigurable Systems. MTV 2004: 85-90
8EEGiacomo Bucci, Andrea Fedeli, Luigi Sassoli, Enrico Vicario: Timed State Space Analysis of Real-Time Preemptive Systems. IEEE Trans. Software Eng. 30(2): 97-111 (2004)
2003
7EEGiacomo Bucci, Andrea Fedeli, Luigi Sassoli, Enrico Vicario: Modeling Flexible Real Time Systems with Preemptive Time Petri Nets. ECRTS 2003: 279-286
6EEGiacomo Bucci, Andrea Fedeli, Enrico Vicario: Predicting Timeliness of Reactive Systems under Flexible Scheduling. ISADS 2003: 125-130
5EEFranco Fummi, Graziano Pravadelli, Andrea Fedeli, Umberto Rossi, Franco Toto: On the Use of a High-Level Fault Model to Check Properties Incompleteness. MEMOCODE 2003: 145-152
4EEGiacomo Bucci, Andrea Fedeli, Enrico Vicario: Specification and Simulation of Real Time Concurrent Systems Using Standard SDL Tools. SDL Forum 2003: 203-217
2002
3EEPaolo Azzoni, Andrea Fedeli, Franco Fummi, Graziano Pravadelli, Umberto Rossi, Franco Toto: An error simulation based approach to measure error coverage of formal properties. ACM Great Lakes Symposium on VLSI 2002: 53-58
2EEJoel Blasquez, Marten van Hulst, Andrea Fedeli, Jean-Luc Lambert, Dominique Borrione, Coby Hanoch, Pierre Bricaud: Formal Verification Techniques: Industrial Status and Perspectives. DATE 2002: 1050-1051
2001
1EEUmberto Rossi, Andrea Fedeli, Marco Boschini, Franco Toto: Concrete Impact of Formal Verification on Quality in IP Design and Implementation. ISQED 2001: 38-43

Coauthor Index

1Paolo Azzoni [3]
2Joel Blasquez [2]
3Nicola Bombieri [10] [11] [13]
4Michele Borgatti [9]
5Dominique Borrione [2]
6Marco Boschini [1]
7Menouer Boubekeur [14]
8Pierre Bricaud [2]
9Giacomo Bucci [4] [6] [7] [8]
10Franco Fummi [3] [5] [9] [10] [11] [12] [13]
11Coby Hanoch [2]
12Marten van Hulst [2]
13Jean-Luc Lambert [2] [9]
14Ka Lok Man (Ka L. Man) [14]
15Cristina Marconcini [9]
16Michele Mercaldi [14]
17Imed Moussa [9]
18Graziano Pravadelli [3] [5] [9] [12] [13]
19Umberto Rossi [1] [3] [5] [9]
20Luigi Sassoli [7] [8]
21Michel P. Schellekens [14]
22Franco Toto [1] [3] [5]
23Enrico Vicario [4] [6] [7] [8]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)