2009 |
10 | EE | Costas Argyrides,
Ahmad A. Al-Yamani,
Carlos Arthur Lang Lisbôa,
Luigi Carro,
Dhiraj K. Pradhan:
Increasing memory yield in future technologies through innovative design.
ISQED 2009: 622-626 |
2008 |
9 | EE | Costas Argyrides,
Stephania Loizidou,
Dhiraj K. Pradhan:
Area Reliability Trade-Off in Improved Reed Muller Coding.
SAMOS 2008: 116-125 |
8 | EE | Jimson Mathew,
Costas Argyrides,
Abusaleh M. Jabir,
Hafizur Rahaman,
Dhiraj K. Pradhan:
Single Error Correcting Finite Field Multipliers Over GF(2m).
VLSI Design 2008: 33-38 |
7 | EE | Carlos Arthur Lang Lisbôa,
Costas Argyrides,
Dhiraj K. Pradhan,
Luigi Carro:
Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.
VTS 2008: 363-370 |
2007 |
6 | EE | Costas Argyrides,
Hamid R. Zarandi,
Dhiraj K. Pradhan:
Matrix Codes: Multiple Bit Upsets Tolerant Method for SRAM Memories.
DFT 2007: 340-348 |
5 | EE | Costas Argyrides,
Dhiraj K. Pradhan:
Highly Reliable Power Aware Memory Design.
IOLTS 2007: 189-190 |
4 | EE | Hamid R. Zarandi,
Seyed Ghassem Miremadi,
Costas Argyrides,
Dhiraj K. Pradhan:
Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs.
IPDPS 2007: 1-6 |
3 | EE | Costas Argyrides,
Hamid R. Zarandi,
Dhiraj K. Pradhan:
Multiple Upsets Tolerance in SRAM Memory.
ISCAS 2007: 365-368 |
2 | EE | Hamid R. Zarandi,
Seyed Ghassem Miremadi,
Costas Argyrides,
Dhiraj K. Pradhan:
CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs.
ISCAS 2007: 3696-3699 |
1 | EE | Costas Argyrides,
Carlos Arthur Lang Lisbôa,
Luigi Carro,
Dhiraj K. Pradhan:
A soft error robust and power aware memory design.
SBCCI 2007: 300-305 |