2008 |
31 | EE | François-Fabien Ferhani,
Nirmal R. Saxena,
Edward J. McCluskey,
Phil Nigh:
How Many Test Patterns are Useless?
VTS 2008: 23-28 |
2004 |
30 | EE | Subhasish Mitra,
Wei-Je Huang,
Nirmal R. Saxena,
Shu-Yi Yu,
Edward J. McCluskey:
Reconfigurable Architecture for Autonomous Self-Repair.
IEEE Design & Test of Computers 21(3): 228-240 (2004) |
29 | EE | Subhasish Mitra,
Nirmal R. Saxena,
Edward J. McCluskey:
Efficient Design Diversity Estimation for Combinational Circuits.
IEEE Trans. Computers 53(11): 1483-1492 (2004) |
2002 |
28 | EE | Subhasish Mitra,
Nirmal R. Saxena,
Edward J. McCluskey:
A Design Diversity Metric and Analysis of Redundant Systems.
IEEE Trans. Computers 51(5): 498-510 (2002) |
2001 |
27 | EE | Subhasish Mitra,
Nirmal R. Saxena,
Edward J. McCluskey:
Techniques for Estimation of Design Diversity for Combinational Logic Circuits.
DSN 2001: 25-36 |
2000 |
26 | EE | Shu-Yi Yu,
Nirmal R. Saxena,
Edward J. McCluskey:
An ACS Robotic Control Algorithm with Fault Tolerant Capabilities.
FCCM 2000: 175-184 |
25 | EE | Wei-Je Huang,
Nirmal R. Saxena,
Edward J. McCluskey:
A Reliable LZ Data Compressor on Reconfigurable Coprocessors.
FCCM 2000: 249-258 |
24 | EE | Subhasish Mitra,
Nirmal R. Saxena,
Edward J. McCluskey:
Fault Escapes in Duplex Systems.
VTS 2000: 453-458 |
23 | EE | Nirmal R. Saxena,
Santiago Fernández-Gomez,
Wei-Je Huang,
Subhasish Mitra,
Shu-Yi Yu,
Edward J. McCluskey:
Dependable Computing and Online Testing in Adaptive and Configurable Systems.
IEEE Design & Test of Computers 17(1): 29-41 (2000) |
1999 |
22 | | Subhasish Mitra,
Nirmal R. Saxena,
Edward J. McCluskey:
A design diversity metric and reliability analysis for redundant systems.
ITC 1999: 662-671 |
21 | | Chaohuang Zeng,
Nirmal R. Saxena,
Edward J. McCluskey:
Finite state machine synthesis with concurrent error detection.
ITC 1999: 672-679 |
1997 |
20 | | Nirmal R. Saxena,
Edward J. McCluskey:
Parallel Signatur Analysis Design with Bounds on Aliasing.
IEEE Trans. Computers 46(4): 425-438 (1997) |
1996 |
19 | | Irith Pomeranz,
Nirmal R. Saxena,
Richard Reeve,
Paritosh Kulkarni,
Yan A. Li:
Generation of Test Cases for Hardware Design Verification of a Super-Scalar Fetch Processor.
ITC 1996: 904-913 |
18 | | Nirmal R. Saxena,
Edward J. McCluskey:
Counting Two-State Transition-Tour Sequences.
IEEE Trans. Computers 45(11): 1337-1342 (1996) |
1995 |
17 | | Nirmal R. Saxena,
Chien Chen,
Ravi Swami,
Hideki Osone,
Shalesh Thusoo,
David Lyon,
David Chang,
Anand Dharmaraj,
Niteen Patkar,
Yizhi Lu,
Ben Chia:
Error Detection and Handling in a Superscalar, Speculative Out-of-Order Execution Processor System.
FTCS 1995: 464-471 |
16 | | Babu Turumella,
Aiman Kabakibo,
Manjunath Bogadi,
Karakunakara Menon,
Shaleah Thusoo,
Long Nguyen,
Nirmal R. Saxena,
Michael Chow:
Design Verification of a Super-Scalar RISC Processor.
FTCS 1995: 472-477 |
15 | | David R. Barach,
Jaspal Kohli,
John Slice,
Marc Spaulding,
Rajeev Bharadhwaj,
Don Hudson,
Cliff Neighbors,
Nirmal R. Saxena,
Rolland Crunk:
HALSIM - A Very Fast SPARC-V9 Behavioral Model.
MASCOTS 1995: 249-252 |
14 | | Nirmal R. Saxena,
David Chih-Wei Chang,
Kevin Dawallu,
Jaspal Kohli,
Pat Helland:
Fault-Tolerant Features in the HaL Memory Management Unit.
IEEE Trans. Computers 44(2): 170-180 (1995) |
13 | | Daniel Boley,
Gene H. Golub,
Samy Makar,
Nirmal R. Saxena,
Edward J. McCluskey:
Floating Point Fault Tolerance with Backward Error Assertions.
IEEE Trans. Computers 44(2): 302-311 (1995) |
1994 |
12 | EE | Nirmal R. Saxena,
Edward J. McCluskey:
Linear Complexity Assertions for Sorting.
IEEE Trans. Software Eng. 20(6): 424-431 (1994) |
1993 |
11 | | Nirmal R. Saxena,
Ravi Tangirala,
Ajay Srivastava:
Algorithmic Synthesis of High Level Tests for Data Path Designs.
FTCS 1993: 360-369 |
10 | | David Chih-Wei Chang,
Nirmal R. Saxena:
Concurrent Error Detection/Correction in the HAL MMU Chip.
FTCS 1993: 630-635 |
1992 |
9 | | Nirmal R. Saxena,
Piero Franco,
Edward J. McCluskey:
Simple Bounds on Serial Signature Analysis Aliasing for Random Testing.
IEEE Trans. Computers 41(5): 638-645 (1992) |
1991 |
8 | | Nirmal R. Saxena,
Piero Franco,
Edward J. McCluskey:
Bounds on Signature Analysis Aliasing for Random Testing.
FTCS 1991: 104-113 |
7 | | Nirmal R. Saxena,
Piero Franco,
Edward J. McCluskey:
Refined Bounds on Signature Analysis Aliasing for Random Testing.
ITC 1991: 818-827 |
1990 |
6 | | Nirmal R. Saxena,
Edward J. McCluskey:
Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums.
IEEE Trans. Computers 39(4): 554-559 (1990) |
5 | | Nirmal R. Saxena,
Edward J. McCluskey:
Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks.
IEEE Trans. Computers 39(7): 969-975 (1990) |
1988 |
4 | EE | John P. Robinson,
Nirmal R. Saxena:
Simultaneous signature and syndrome compression.
IEEE Trans. on CAD of Integrated Circuits and Systems 7(5): 584-589 (1988) |
3 | | Nirmal R. Saxena,
John P. Robinson:
Syndrome and transition count are uncorrelated.
IEEE Transactions on Information Theory 34(1): 64-69 (1988) |
1987 |
2 | | John P. Robinson,
Nirmal R. Saxena:
A Unified View of Test Compression Methods.
IEEE Trans. Computers 36(1): 94-99 (1987) |
1986 |
1 | | Nirmal R. Saxena,
John P. Robinson:
Accumulator Compression Testing.
IEEE Trans. Computers 35(4): 317-321 (1986) |