Huawei Li

2008
34	EE	Fei Wang, Yu Hu, Huawei Li, Xiaowei Li: A design- for-diagnosis technique for diagnosing both scan chain faults and combinational circuit faults. ASP-DAC 2008: 571-576
33	EE	Xiang Fu, Huawei Li, Yu Hu, Xiaowei Li: Robust test generation for power supply noise induced path delay faults. ASP-DAC 2008: 659-662
32	EE	Da Wang, Rui Li, Yu Hu, Huawei Li, Xiaowei Li: A Case Study on At-Speed Testing for a Gigahertz Microprocessor. DELTA 2008: 326-331
31	EE	Minjin Zhang, Huawei Li, Xiaowei Li: Static Crosstalk Noise Analysis with Transition Map. DELTA 2008: 462-465
30	EE	Hui Liu, Huawei Li, Yu Hu, Xiaowei Li: A Scan-Based Delay Test Method for Reduction of Overtesting. DELTA 2008: 521-526
29	EE	Ying Zhang, Huawei Li, Xiaowei Li, Yu Hu: Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects. VTS 2008: 377-382
28	EE	Minjin Zhang, Huawei Li, Xiaowei Li: Multiple Coupling Effects Oriented Path Delay Test Generation. VTS 2008: 383-388
2007
27	EE	Lei Zhang, Huawei Li, Xiaowei Li: A Routing Algorithm for Random Error Tolerance in Network-on-Chip. HCI (4) 2007: 1210-1219
26	EE	Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra: Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. IEEE Trans. VLSI Syst. 15(5): 531-540 (2007)
2006
25	EE	Huawei Li, Yu Fan, Tao Wu: Impact of Load Characteristics and Low-Voltage Load Shedding Schedule on Dynamic Voltage Stability. CCECE 2006: 2249-2252
24	EE	Huawei Li, Yu Fan, Rong Shi: Chaos and Ferroresonance. CCECE 2006: 494-497
23	EE	Tong Liu, Huawei Li, Xiaowei Li, Yinhe Han: Fast Packet Classification using Group Bit Vector. GLOBECOM 2006
22	EE	Huawei Li, Pei-Fu Shen, Xiaowei Li: Robust Test Generation for Precise Crosstalk-induced Path Delay Faults. VTS 2006: 300-305
21	EE	Yu Hu, Yinhe Han, Xiaowei Li, Huawei Li, Xiaoqing Wen: Compression/Scan Co-design for Reducing Test Data Volume, Scan-in Power Dissipation, and Test Application Time. IEICE Transactions 89-D(10): 2616-2625 (2006)
20	EE	Yinhe Han, Huawei Li, Xiaowei Li, Anshuman Chandra: Response compaction for system-on-a-chip based on advanced convolutional codes. Science in China Series F: Information Sciences 49(2): 262-272 (2006)
2005
19	EE	Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li: Theoretic analysis and enhanced X-tolerance of test response compact based on convolutional code. ASP-DAC 2005: 53-58
18	EE	Shuguang Gong, Huawei Li, Yufeng Xu, Tong Liu, Xiaowei Li: Design of an efficient memory subsystem for network processor. ASP-DAC 2005: 897-900
17	EE	Pei-Fu Shen, Huawei Li, Yongjun Xu, Xiaowei Li: Non-robust Test Generation for Crosstalk-Induced Delay Faults. Asian Test Symposium 2005: 120-125
16	EE	Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li: Using MUXs Network to Hide Bunches of Scan Chains. ISQED 2005: 238-243
15	EE	Yu Hu, Xiaowei Li, Huawei Li, Xiaoqing Wen: Compression/Scan Co-Design for Reducing Test Data Volume, Scan-in Power Dissipation and Test Application Time. PRDC 2005: 175-182
14	EE	Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li, Anshuman Chandra, Xiaoqing Wen: Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores. IEICE Transactions 88-D(9): 2126-2134 (2005)
13	EE	Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra: Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channels Reduction. J. Comput. Sci. Technol. 20(2): 201-209 (2005)
12	EE	Huawei Li, Xiaowei Li: Selection of Crosstalk-Induced Faults in Enhanced Delay Test. J. Electronic Testing 21(2): 181-195 (2005)
2004
11	EE	Yu Hu, Yinhe Han, Huawei Li, Tao Lv, Xiaowei Li: Pair Balance-Based Test Scheduling for SOCs. Asian Test Symposium 2004: 236-241
10	EE	Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Rapid and Energy-Efficient Testing for Embedded Cores. Asian Test Symposium 2004: 8-13
9	EE	Yinhe Han, Yu Hu, Huawei Li, Xiaowei Li, Anshuman Chandra: Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes. DFT 2004: 298-305
2003
8	EE	Huawei Li, Yue Zhang, Xiaowei Li: Delay Test Pattern Generation Considering Crosstalk-Induced Effects. Asian Test Symposium 2003: 178-183
7	EE	Yinhe Han, Yongjun Xu, Huawei Li, Xiaowei Li, Anshuman Chandra: Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Teste. Asian Test Symposium 2003: 440-445
6	EE	Zhigang Yin, Yinghua Min, Xiaowei Li, Huawei Li: A Novel RT-Level Behavioral Description Based ATPG Method. J. Comput. Sci. Technol. 18(3): 308-317 (2003)
2002
5	EE	Zuying Luo, Xiaowei Li, Huawei Li, Shiyuan Yang, Yinghua Min: Test Power Optimization Techniques for CMOS Circuits. Asian Test Symposium 2002: 332-337
2001
4	EE	Huawei Li, Yinghua Min, Zhongcheng Li: An RT-Level ATPG Based on Clustering of Circuit States. Asian Test Symposium 2001: 213-218
3	EE	Xiaowei Li, Huawei Li, Yinghua Min: Reducing Power Dissipation during At-Speed Test Application. DFT 2001: 116-
2000
2	EE	Huawei Li, Zhongcheng Li, Yinghua Min: Reduction of Number of Paths to be Tested in Delay Testing. J. Electronic Testing 16(5): 477-485 (2000)
1998
1	EE	Huawei Li, Zhongcheng Li, Yinghua Min: Delay Testing with Double Observations. Asian Test Symposium 1998: 96-

Coauthor Index

1	Anshuman Chandra	[7] [9] [10] [13] [14] [20] [26]
2	Yu Fan	[24] [25]
3	Xiang Fu	[33]
4	Shuguang Gong	[18]
5	Yinhe Han	[7] [9] [10] [11] [13] [14] [16] [19] [20] [21] [23] [26]
6	Yu Hu	[9] [10] [11] [14] [15] [16] [19] [21] [26] [29] [30] [32] [33] [34]
7	Rui Li	[32]
8	Xiaowei Li	[3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [26] [27] [28] [29] [30] [31] [32] [33] [34]
9	Zhongcheng Li	[1] [2] [4]
10	Hui Liu	[30]
11	Tong Liu	[18] [23]
12	Zuying Luo	[5]
13	Tao Lv	[11]
14	Yinghua Min	[1] [2] [3] [4] [5] [6]
15	Pei-Fu Shen	[17] [22]
16	Rong Shi	[24]
17	Da Wang	[32]
18	Fei Wang	[34]
19	Xiaoqing Wen	[14] [15] [21]
20	Tao Wu	[25]
21	Yongjun Xu	[7] [17]
22	Yufeng Xu	[18]
23	Shiyuan Yang	[5]
24	Zhigang Yin	[6]
25	Lei Zhang	[27]
26	Minjin Zhang	[28] [31]
27	Ying Zhang	[29]
28	Yue Zhang	[8]

Colors in the list of coauthors