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Yoshio Kameda

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2008
5EEYoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda: Development of Cryopackaging and I/O Technologies for High-Speed Superconductive Digital Systems. IEICE Transactions 91-C(3): 325-332 (2008)
4EEYoshio Kameda, Yoshihito Hashimoto, Shinichi Yorozu: Design and Demonstration of a 4×4 SFQ Network Switch Prototype System and 10-Gbps Bit-Error-Rate Measurement. IEICE Transactions 91-C(3): 333-341 (2008)
2005
3EEYoshihito Hashimoto, Shinichi Yorozu, Yoshio Kameda, Akira Fujimaki, Hirotaka Terai, Nobuyuki Yoshikawa: Development of Passive Interconnection Technology for SFQ Circuits. IEICE Transactions 88-C(2): 198-207 (2005)
1998
2EEYoshio Kameda, Stanislav Polonsky, Masaaki Maezawa, Takashi Nanya: Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic. ASYNC 1998: 262-273
1996
1EEYoshio Kameda: Pulse-Driven Delay-Insensitive Circuits using Single-Flux-Quantum Devices. ICCD 1996: 419-425

Coauthor Index

1Akira Fujimaki [3]
2Yoshihito Hashimoto [3] [4] [5]
3Masaaki Maezawa [2]
4Takashi Nanya [2]
5Stanislav Polonsky [2]
6Hirotaka Terai [3]
7Shinichi Yorozu [3] [4] [5]
8Nobuyuki Yoshikawa [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)