2008 |
5 | EE | Yoshihito Hashimoto,
Shinichi Yorozu,
Yoshio Kameda:
Development of Cryopackaging and I/O Technologies for High-Speed Superconductive Digital Systems.
IEICE Transactions 91-C(3): 325-332 (2008) |
4 | EE | Yoshio Kameda,
Yoshihito Hashimoto,
Shinichi Yorozu:
Design and Demonstration of a 4×4 SFQ Network Switch Prototype System and 10-Gbps Bit-Error-Rate Measurement.
IEICE Transactions 91-C(3): 333-341 (2008) |
2005 |
3 | EE | Yoshihito Hashimoto,
Shinichi Yorozu,
Yoshio Kameda,
Akira Fujimaki,
Hirotaka Terai,
Nobuyuki Yoshikawa:
Development of Passive Interconnection Technology for SFQ Circuits.
IEICE Transactions 88-C(2): 198-207 (2005) |
1998 |
2 | EE | Yoshio Kameda,
Stanislav Polonsky,
Masaaki Maezawa,
Takashi Nanya:
Primitive-Level Pipelining Method on Delay-Insensitive Model for RSFQ Pulse-Driven Logic.
ASYNC 1998: 262-273 |
1996 |
1 | EE | Yoshio Kameda:
Pulse-Driven Delay-Insensitive Circuits using Single-Flux-Quantum Devices.
ICCD 1996: 419-425 |